llvm-project/llvm/lib/Target/AMDGPU/Disassembler
Dmitry Preobrazhensky 2713495318 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers
See bug 35561: https://bugs.llvm.org/show_bug.cgi?id=35561

This patch also affects implementation of SGPR and VGPR registers though changes are cosmetic.

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D41437

llvm-svn: 321359
2017-12-22 15:18:06 +00:00
..
AMDGPUDisassembler.cpp [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers 2017-12-22 15:18:06 +00:00
AMDGPUDisassembler.h [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers 2017-12-22 15:18:06 +00:00
CMakeLists.txt [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc. 2016-05-26 17:00:33 +00:00
LLVMBuild.txt