forked from OSchip/llvm-project
169 lines
6.2 KiB
C++
169 lines
6.2 KiB
C++
//===-- llvm/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "DbgValueHistoryCalculator.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <algorithm>
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#include <map>
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#define DEBUG_TYPE "dwarfdebug"
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namespace llvm {
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namespace {
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// Maps physreg numbers to the variables they describe.
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typedef std::map<unsigned, SmallVector<const MDNode *, 1>> RegDescribedVarsMap;
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}
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// \brief If @MI is a DBG_VALUE with debug value described by a
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// defined register, returns the number of this register.
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// In the other case, returns 0.
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static unsigned isDescribedByReg(const MachineInstr &MI) {
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assert(MI.isDebugValue());
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assert(MI.getNumOperands() == 3);
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// If location of variable is described using a register (directly or
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// indirecltly), this register is always a first operand.
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return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
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}
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// \brief Claim that @Var is not described by @RegNo anymore.
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static void dropRegDescribedVar(RegDescribedVarsMap &RegVars,
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unsigned RegNo, const MDNode *Var) {
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const auto &I = RegVars.find(RegNo);
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assert(RegNo != 0U && I != RegVars.end());
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auto &VarSet = I->second;
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const auto &VarPos = std::find(VarSet.begin(), VarSet.end(), Var);
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assert(VarPos != VarSet.end());
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VarSet.erase(VarPos);
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// Don't keep empty sets in a map to keep it as small as possible.
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if (VarSet.empty())
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RegVars.erase(I);
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}
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// \brief Claim that @Var is now described by @RegNo.
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static void addRegDescribedVar(RegDescribedVarsMap &RegVars,
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unsigned RegNo, const MDNode *Var) {
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assert(RegNo != 0U);
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RegVars[RegNo].push_back(Var);
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}
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static void clobberVariableLocation(SmallVectorImpl<const MachineInstr *> &VarHistory,
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const MachineInstr &ClobberingInstr) {
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assert(!VarHistory.empty());
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// DBG_VALUE we're clobbering should belong to the same MBB.
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assert(VarHistory.back()->isDebugValue());
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assert(VarHistory.back()->getParent() == ClobberingInstr.getParent());
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VarHistory.push_back(&ClobberingInstr);
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}
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// \brief Terminate the location range for variables described by register
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// @RegNo by inserting @ClobberingInstr to their history.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
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DbgValueHistoryMap &HistMap,
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const MachineInstr &ClobberingInstr) {
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const auto &I = RegVars.find(RegNo);
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if (I == RegVars.end())
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return;
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// Iterate over all variables described by this register and add this
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// instruction to their history, clobbering it.
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for (const auto &Var : I->second)
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clobberVariableLocation(HistMap[Var], ClobberingInstr);
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RegVars.erase(I);
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}
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// \brief Terminate the location range for all variables, described by registers
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// clobbered by @MI.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
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const MachineInstr &MI,
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const TargetRegisterInfo *TRI,
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DbgValueHistoryMap &HistMap) {
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for (const MachineOperand &MO : MI.operands()) {
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if (!MO.isReg() || !MO.isDef() || !MO.getReg())
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continue;
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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++AI) {
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unsigned RegNo = *AI;
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clobberRegisterUses(RegVars, RegNo, HistMap, MI);
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}
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}
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}
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// \brief Terminate the location range for all register-described variables
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// by inserting @ClobberingInstr to their history.
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static void clobberAllRegistersUses(RegDescribedVarsMap &RegVars,
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DbgValueHistoryMap &HistMap,
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const MachineInstr &ClobberingInstr) {
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for (const auto &I : RegVars)
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for (const auto &Var : I.second)
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clobberVariableLocation(HistMap[Var], ClobberingInstr);
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RegVars.clear();
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}
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// \brief Update the register that describes location of @Var in @RegVars map.
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static void
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updateRegForVariable(RegDescribedVarsMap &RegVars, const MDNode *Var,
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const SmallVectorImpl<const MachineInstr *> &VarHistory,
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const MachineInstr &MI) {
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if (!VarHistory.empty()) {
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const MachineInstr &Prev = *VarHistory.back();
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// Check if Var is currently described by a register by instruction in the
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// same basic block.
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if (Prev.isDebugValue() && Prev.getDebugVariable() == Var &&
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Prev.getParent() == MI.getParent()) {
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if (unsigned PrevReg = isDescribedByReg(Prev))
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dropRegDescribedVar(RegVars, PrevReg, Var);
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}
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}
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assert(MI.getDebugVariable() == Var);
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if (unsigned MIReg = isDescribedByReg(MI))
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addRegDescribedVar(RegVars, MIReg, Var);
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}
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void calculateDbgValueHistory(const MachineFunction *MF,
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const TargetRegisterInfo *TRI,
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DbgValueHistoryMap &Result) {
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RegDescribedVarsMap RegVars;
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for (const auto &MBB : *MF) {
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for (const auto &MI : MBB) {
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if (!MI.isDebugValue()) {
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// Not a DBG_VALUE instruction. It may clobber registers which describe
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// some variables.
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clobberRegisterUses(RegVars, MI, TRI, Result);
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continue;
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}
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const MDNode *Var = MI.getDebugVariable();
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auto &History = Result[Var];
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if (!History.empty() && History.back()->isIdenticalTo(&MI)) {
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DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
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<< "\t" << History.back() << "\t" << MI << "\n");
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continue;
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}
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updateRegForVariable(RegVars, Var, History, MI);
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History.push_back(&MI);
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}
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// Make sure locations for register-described variables are valid only
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// until the end of the basic block (unless it's the last basic block, in
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// which case let their liveness run off to the end of the function).
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if (!MBB.empty() && &MBB != &MF->back())
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clobberAllRegistersUses(RegVars, Result, MBB.back());
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}
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}
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}
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