forked from OSchip/llvm-project
6d3eecc843
Summary: * Similiar to the ARM backend yse the peephole optimizer to generate more conditional ALU operations; * Add predicated type with default always true to RR instructions in LanaiInstrInfo.td; * Move LanaiSetflagAluCombiner into optimizeCompare; * The ASM parser can currently only handle explicitly specified CC, so specify ".t" (true) where needed in the ASM test; * Remove unused MachineOperand flags; Reviewers: eliben Subscribers: aemerson Differential Revision: http://reviews.llvm.org/D22072 llvm-svn: 274807 |
||
|---|---|---|
| .. | ||
| codemodel.ll | ||
| comparisons_i32.ll | ||
| comparisons_i64.ll | ||
| constant_multiply.ll | ||
| delay_filler.ll | ||
| i32.ll | ||
| lanai-misched-trivial-disjoint.ll | ||
| lit.local.cfg | ||
| mem_alu_combiner.ll | ||
| multiply.ll | ||
| rshift64.ll | ||
| select.ll | ||
| set_and_hi.ll | ||
| shift.ll | ||
| stack-frame.ll | ||
| sub-cmp-peephole.ll | ||
| subword.ll | ||