forked from OSchip/llvm-project
41 lines
1.4 KiB
LLVM
41 lines
1.4 KiB
LLVM
; RUN: opt %loadPolly -polly-codegen -polly-invariant-load-hoisting=true -S < %s | FileCheck %s
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;
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; CHECK-LABEL: polly.preload.begin:
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; CHECK-NEXT: %polly.access.B = getelementptr i32, i32 addrspace(1)* %B, i64 0
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; CHECK-NOT: addrspacecast
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; CHECK-NEXT: %polly.access.B.load = load i32, i32 addrspace(1)* %polly.access.B
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;
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; CHECK-LABEL: polly.stmt.bb2:
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; CHECK-NEXT: %scevgep = getelementptr i32, i32* %A, i64 %polly.indvar
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; CHECK-NEXT: store i32 %polly.access.B.load, i32* %scevgep, align 4
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;
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; void f(int *restrict A, int *restrict B) {
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; for (int i = 0; i < 1024; i++)
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; A[i] = *B;
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32* noalias %A, i32 addrspace(1)* noalias %B) {
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bb:
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br label %bb1
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bb1: ; preds = %bb4, %bb
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%indvars.iv = phi i64 [ %indvars.iv.next, %bb4 ], [ 0, %bb ]
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%exitcond = icmp ne i64 %indvars.iv, 1024
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br i1 %exitcond, label %bb2, label %bb5
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bb2: ; preds = %bb1
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%tmp = load i32, i32 addrspace(1)* %B, align 4
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%tmp3 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 %tmp, i32* %tmp3, align 4
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br label %bb4
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bb4: ; preds = %bb2
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %bb1
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bb5: ; preds = %bb1
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ret void
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}
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