llvm-project/mlir/test/Conversion
Michal Terepeta 7e65fc9a60 [mlir][Vector] Support 0-D vectors in `BroadcastOp`
This changes the op to produce `AnyVectorOfAnyRank` following mostly the code for 1-D vectors.

Depends On D114598

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114550
2021-11-26 17:17:18 +00:00
..
AffineToStandard [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
ArithmeticToLLVM [mlir:DialectConversion] Restructure how argument/target materializations get invoked 2021-10-27 02:09:04 +00:00
ArithmeticToSPIRV [mlir][spirv] arith::RemSIOp OpenCL lowering 2021-11-25 12:44:06 +03:00
AsyncToLLVM [MLIR][LLVM] Permit integer types in switch other than i32 2021-11-16 12:00:37 -05:00
ComplexToLLVM [mlir:DialectConversion] Restructure how argument/target materializations get invoked 2021-10-27 02:09:04 +00:00
ComplexToStandard [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
GPUCommon [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
GPUToCUDA [mlir] Change test-gpu-to-cubin to derive from SerializeToBlobPass 2021-03-11 10:42:20 +01:00
GPUToNVVM [mlir][gpu] Extend shuffle op modes and add nvvm lowering 2021-11-19 11:14:31 -08:00
GPUToROCDL [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
GPUToROCm [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
GPUToSPIRV [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
GPUToVulkan [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
LinalgToSPIRV [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
LinalgToVector [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
MathToLLVM [mlir] factor math-to-llvm out of standard-to-llvm 2021-07-12 11:09:42 +02:00
MathToLibm [mlir] Support multi-dimensional vectors in MathToLibm conversion. 2021-11-16 11:13:52 +01:00
MathToSPIRV [mlir][spirv] arith::RemSIOp OpenCL lowering 2021-11-25 12:44:06 +03:00
MemRefToLLVM [mlir:DialectConversion] Restructure how argument/target materializations get invoked 2021-10-27 02:09:04 +00:00
MemRefToSPIRV [mlir:DialectConversion] Restructure how argument/target materializations get invoked 2021-10-27 02:09:04 +00:00
OpenACCToLLVM [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
OpenACCToSCF [mlir][openacc] Add conversion for if operand to scf.if for standalone data operation 2021-06-07 12:10:03 -04:00
OpenMPToLLVM [mlir:DialectConversion] Restructure how argument/target materializations get invoked 2021-10-27 02:09:04 +00:00
PDLToPDLInterp Multi-root PDL matching using upward traversals. 2021-11-26 18:11:37 +05:30
SCFToGPU [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
SCFToOpenMP [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
SCFToSPIRV [mlir] spirv: Add scf.while spirv conversion 2021-11-16 13:19:34 +03:00
SCFToStandard [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
SPIRVToLLVM [mlir][SPIRVToLLVM] Add shufflevector conversion 2021-11-01 23:05:37 +08:00
ShapeToStandard [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
StandardToLLVM [mlir][Standard] Support 0-D vectors in `SplatOp` 2021-11-26 17:05:15 +00:00
StandardToSPIRV [mlir][spirv] Add math to OpenCL conversion 2021-11-24 02:31:21 +03:00
TosaToLinalg [mlir][tosa] Separate tosa.transpose_conv decomposition and added stride support 2021-11-23 12:16:44 -08:00
TosaToSCF [MLIR][TOSA] Resubmit Tosa to Standard/SCF Lowerings (const, if, while)" 2021-02-26 17:44:12 -08:00
TosaToStandard [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
VectorToGPU [mlir][VectorToGPU] Support more cases in conversion to MMA ops 2021-11-11 13:10:38 -08:00
VectorToLLVM [mlir][Vector] Support 0-D vectors in `BroadcastOp` 2021-11-26 17:17:18 +00:00
VectorToROCDL [MLIR] Replace std ops with arith dialect ops 2021-10-13 03:07:03 +00:00
VectorToSCF [mlir][vector] Insert/extract element can accept index 2021-11-18 22:40:29 +00:00
VectorToSPIRV [mlir][vector] Insert/extract element can accept index 2021-11-18 22:40:29 +00:00