Nicolas Vasilache 218f0e611a Add syntactic sugar for strided memref parsing. ... This CL implements the last remaining bit of the [strided memref proposal](https://groups.google.com/a/tensorflow.org/forum/#!topic/mlir/MaL8m2nXuio). The syntax is a bit more explicit than what was originally proposed and resembles: `memref<?x?xf32, offset: 0 strides: [?, 1]>` Nonnegative strides and offsets are currently supported. Future extensions will include negative strides. This also gives a concrete example of syntactic sugar for the ([RFC] Proposed Changes to MemRef and Tensor MLIR Types)[https://groups.google.com/a/tensorflow.org/forum/#!topic/mlir/-wKHANzDNTg]. The underlying implementation still uses AffineMap layout. PiperOrigin-RevId: 272717437		2019-10-03 12:34:36 -07:00
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canonicalize.mlir	Disallow index types in memrefs.	2019-10-03 00:58:29 -07:00
dma.mlir	Standardize the value numbering in the AsmPrinter.	2019-07-09 10:41:00 -07:00
inlining.mlir	Add support for conservatively inlining Affine operations.	2019-09-05 15:20:25 -07:00
invalid.mlir	Emit an error for missing '[' when parsing an AffineMapOfSSAIds.	2019-07-22 15:06:44 -07:00
load-store-invalid.mlir	Verify that affine.load/store/dma_start/dma_wait operands are valid dimension or symbol identifiers.	2019-07-27 08:20:38 -07:00
load-store.mlir	Fix verification of zero-dim memref in affine.load/affine.store/std.load/std.store	2019-08-07 10:31:49 -07:00
memref-stride-calculation.mlir	Add syntactic sugar for strided memref parsing.	2019-10-03 12:34:36 -07:00
ops.mlir	Fix typo in test/AffineOps/ops.mlir	2019-09-15 09:06:39 -07:00