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llvm-project/llvm/test/CodeGen
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David Truby 2e0fb007d6 [llvm][AArch64][SVE] Fold literals into math instructions 
SVE has predicated literal forms of some instructions for specific
literals, which currently are generated correctly when using ACLE
but not when those instructions are generated directly.

This adds the patterns to generate those instructions when
generating from standard LLVM IR instructions.

Differential Revision: https://reviews.llvm.org/D99074
 		2021-10-17 10:57:04 +00:00
..
AArch64 [llvm][AArch64][SVE] Fold literals into math instructions 2021-10-17 10:57:04 +00:00
AMDGPU Revert "[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols" 2021-10-15 16:16:18 -06:00
ARC [ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE 2021-09-10 13:04:08 -07:00
ARM [ARM] Fix MOVCC peephole to not use an incorrect register class 2021-10-15 10:54:26 +01:00
AVR [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
BPF BPF: rename BTF_KIND_TAG to BTF_KIND_DECL_TAG 2021-10-11 21:33:39 -07:00
Generic [AIX] Disable tests failing due to lack of .loc and .file directive support 2021-10-08 11:55:12 -04:00
Hexagon [LiveIntervals] Repair subreg ranges in processTiedPairs 2021-09-28 08:10:16 +01:00
Inputs
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Lanai [Lanai] implement wide immediate support 2021-09-10 10:54:43 +00:00
M68k [M68k][test] Migrate the remaining fixup and relaxation tests 2021-09-04 16:27:13 -07:00
MIR DebugInfo: Use clang's preferred names for integer types 2021-10-06 16:02:34 -07:00
MSP430 [llvm-readobj] Support dumping of MSP430 ELF attributes 2021-09-28 00:56:11 +03:00
Mips Delay outgoing register assignments to last. 2021-10-04 12:33:20 -07:00
NVPTX [NVPTX] Add VRFrame and VRFrameLocal to integer register classes 2021-10-14 16:19:03 +03:00
PowerPC [AIX] Enable int128 in 64 bit mode 2021-10-15 16:23:04 +00:00
RISCV [RISCV] Optimize immediate materialisation with SH*ADD 2021-10-15 06:46:41 +00:00
SPARC Fix tests defaulting to incorrect triples on AIX 2021-09-27 11:30:45 -04:00
SystemZ [SystemZ] Handle huge immediates in SystemZInstrInfo::loadImmediate(). 2021-10-15 19:08:45 +02:00
Thumb [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
Thumb2 [ARM] Introduce a MQPRCopy 2021-10-07 12:52:12 +01:00
VE [VE][Test] Make Scalar/va_arg test generic 2021-10-08 08:07:51 +02:00
WebAssembly [WebAssembly] Add prototype relaxed laneselect instructions 2021-10-15 17:45:09 -07:00
WinCFGuard
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WinEH
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X86 [X86] Add DAG combine for negation of CMOV absolute value pattern. 2021-10-16 13:31:43 -07:00
XCore
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