| .. |
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AsmParser
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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Disassembler
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[NFC] Refactor the tuple of symbol information with structure for llvm-objdump
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2020-02-10 19:23:01 -05:00 |
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MCTargetDesc
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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TargetInfo
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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Utils
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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AMDGPU.h
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[AMDGPU] Bundle loads before post-RA scheduler
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2020-01-24 11:33:38 -08:00 |
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AMDGPU.td
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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AMDGPUAliasAnalysis.cpp
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…
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AMDGPUAliasAnalysis.h
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…
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Simplify getAddressSpace calls
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2019-10-31 07:51:38 -07:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use llvm::StringLiteral instead of StringRef in few places
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2019-09-20 14:31:42 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUArgumentUsageInfo.cpp
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…
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Fix Register copypaste error
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2019-09-05 23:07:10 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Split denormal mode tracking bits
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2020-02-04 10:44:21 -08:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] separate accounting for agprs
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2019-10-02 00:26:58 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUCallLowering.cpp
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[GlobalISel] Tidy up unnecessary calls to createGenericVirtualRegister
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2020-01-31 17:07:16 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
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2019-09-09 23:06:13 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Allow i16 shader arguments
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2020-01-27 06:55:32 -08:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Enhancement on FDIV lowering in AMDGPUCodeGenPrepare
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2020-02-07 11:46:23 -08:00 |
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AMDGPUCombine.td
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AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY
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2020-01-31 06:58:04 -08:00 |
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AMDGPUFeatures.td
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…
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AMDGPUFixFunctionBitcasts.cpp
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…
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AMDGPUFrameLowering.cpp
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUFrameLowering.h
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[Alignment][NFC] Deprecate Align::None()
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2020-01-24 12:53:58 +01:00 |
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AMDGPUGISel.td
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AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY
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2020-01-31 06:58:04 -08:00 |
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
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2020-01-22 10:57:50 -05:00 |
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AMDGPUGlobalISelUtils.cpp
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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AMDGPUGlobalISelUtils.h
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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AMDGPUHSAMetadataStreamer.cpp
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Make llvm::StringRef to std::string conversions explicit.
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2020-01-28 23:25:25 +01:00 |
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AMDGPUHSAMetadataStreamer.h
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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[AMDGPU] Split R600 and GCN subregs
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2020-02-10 08:29:56 -08:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Remove dead kill handling
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2020-02-09 17:59:24 -05:00 |
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AMDGPUISelLowering.h
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AMDGPU: Remove dead kill handling
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2020-02-09 17:59:24 -05:00 |
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AMDGPUInline.cpp
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[NFC] Refactor InlineResult for readability
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2020-01-15 13:34:20 -08:00 |
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AMDGPUInstrInfo.cpp
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…
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AMDGPUInstrInfo.h
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…
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AMDGPUInstrInfo.td
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AMDGPU: Remove dead kill handling
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2020-02-09 17:59:24 -05:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU/GlobalISel: Don't mis-select vector index on a constant
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2020-02-09 18:02:37 -05:00 |
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AMDGPUInstructionSelector.h
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AMDGPU/GlobalISel: Select global MUBUF atomicrmw
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2020-01-31 06:05:41 -08:00 |
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AMDGPUInstructions.td
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AMDGPU: Split denormal mode tracking bits
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2020-02-04 10:44:21 -08:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Look through casts when legalizing vector indexing
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2020-02-09 18:02:10 -05:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Legalize f64 G_FFLOOR for SI
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2020-02-05 14:32:01 -05:00 |
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AMDGPULibCalls.cpp
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Make llvm::StringRef to std::string conversions explicit.
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2020-01-28 23:25:25 +01:00 |
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AMDGPULibFunc.cpp
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Make llvm::StringRef to std::string conversions explicit.
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2020-01-28 23:25:25 +01:00 |
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AMDGPULibFunc.h
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Make llvm::StringRef to std::string conversions explicit.
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2020-01-28 23:25:25 +01:00 |
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AMDGPULowerIntrinsics.cpp
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AMDGPU: Add flag to control mem intrinsic expansion
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2020-02-03 14:26:01 -08:00 |
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AMDGPULowerKernelArguments.cpp
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[Alignement][NFC] Deprecate untyped CreateAlignedLoad
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2020-01-23 13:34:32 +01:00 |
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AMDGPULowerKernelAttributes.cpp
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…
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AMDGPUMCInstLower.cpp
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[MC] Add parameter `Address` to MCInstPrinter::printInst
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2020-01-06 20:42:22 -08:00 |
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AMDGPUMachineCFGStructurizer.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineFunction.h
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineModuleInfo.cpp
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…
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AMDGPUMachineModuleInfo.h
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…
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AMDGPUMacroFusion.cpp
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…
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AMDGPUMacroFusion.h
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…
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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…
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AMDGPUPTNote.h
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…
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AMDGPUPerfHintAnalysis.cpp
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…
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AMDGPUPerfHintAnalysis.h
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…
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AMDGPUPreLegalizerCombiner.cpp
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AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY
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2020-01-31 06:58:04 -08:00 |
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AMDGPUPrintfRuntimeBinding.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUPromoteAlloca.cpp
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[Alignement][NFC] Deprecate untyped CreateAlignedLoad
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2020-01-23 13:34:32 +01:00 |
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AMDGPUPropagateAttributes.cpp
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Make llvm::StringRef to std::string conversions explicit.
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2020-01-28 23:25:25 +01:00 |
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AMDGPURegisterBankInfo.cpp
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GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF
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2020-02-09 19:02:38 -05:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Fix move s.buffer.load to VALU
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2020-02-07 07:19:01 -08:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Replace handling of boolean values
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2020-01-06 18:26:42 -05:00 |
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AMDGPURegisterInfo.cpp
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[AMDGPU] Split R600 and GCN subregs
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2020-02-10 08:29:56 -08:00 |
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AMDGPURegisterInfo.h
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[AMDGPU] Split R600 and GCN subregs
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2020-02-10 08:29:56 -08:00 |
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AMDGPURegisterInfo.td
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…
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AMDGPURewriteOutArguments.cpp
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[Alignment][NFC] Use Align with CreateAlignedStore
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2020-01-23 17:34:32 +01:00 |
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AMDGPUSearchableTables.td
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AMDGPU: Fix divergence analysis of control flow intrinsics
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2020-02-05 09:30:54 -08:00 |
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AMDGPUSubtarget.cpp
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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AMDGPUTargetMachine.cpp
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AMDGPU: Split denormal mode tracking bits
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2020-02-04 10:44:21 -08:00 |
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AMDGPUTargetMachine.h
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…
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AMDGPUTargetObjectFile.cpp
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…
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AMDGPUTargetObjectFile.h
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…
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Fix divergence analysis of control flow intrinsics
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2020-02-05 09:30:54 -08:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Analyze divergence of inline asm
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2020-02-03 12:42:16 -08:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
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2020-01-30 10:55:02 +01:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDILCFGStructurizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDKernelCodeT.h
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…
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BUFInstructions.td
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AMDGPU: Don't use separate cache arguments for s_buffer_load node
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2020-01-30 14:15:26 -08:00 |
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CMakeLists.txt
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[AMDGPU] Bundle loads before post-RA scheduler
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2020-01-24 11:33:38 -08:00 |
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CaymanInstructions.td
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AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
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2020-02-05 00:24:07 -05:00 |
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DSInstructions.td
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[AMDGPU][GlobalISel] Select 8-byte LDS Ops with 4-byte alignment
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2020-01-29 10:42:12 -08:00 |
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EvergreenInstructions.td
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AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
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2020-02-05 00:24:07 -05:00 |
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FLATInstructions.td
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AMDGPU/GlobalISel: Fix not using global atomics on gfx9+
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2020-01-27 07:42:42 -08:00 |
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GCNDPPCombine.cpp
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[AMDGPU][DPP] Corrected DPP combiner
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2019-11-20 15:56:45 +03:00 |
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GCNHazardRecognizer.cpp
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Make more use of MachineInstr::mayLoadOrStore.
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2019-12-19 11:51:52 +00:00 |
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GCNHazardRecognizer.h
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…
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GCNILPSched.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
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GCNIterativeScheduler.cpp
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[AMDGPU] Add file headers for few files where it is missing.
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2020-01-31 02:06:41 +05:30 |
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GCNIterativeScheduler.h
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[AMDGPU] Add file headers for few files where it is missing.
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2020-01-31 02:06:41 +05:30 |
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GCNMinRegStrategy.cpp
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[AMDGPU] Add file headers for few files where it is missing.
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2020-01-31 02:06:41 +05:30 |
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GCNNSAReassign.cpp
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AMDGPU/GFX10: Fix NSA reassign pass when operands are undef
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2020-02-01 22:41:40 +01:00 |
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GCNProcessors.td
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…
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GCNRegBankReassign.cpp
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[AMDGPU] Cleanup assumptions about generated subregs
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2020-02-06 17:39:24 -08:00 |
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GCNRegPressure.cpp
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[AMDGPU] Cleanup assumptions about generated subregs
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2020-02-06 17:39:24 -08:00 |
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GCNRegPressure.h
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[AMDGPU] Add file headers for few files where it is missing.
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2020-01-31 02:06:41 +05:30 |
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GCNSchedStrategy.cpp
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[AMDGPU] Attempt to reschedule withou clustering
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2020-01-27 10:27:16 -08:00 |
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GCNSchedStrategy.h
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[AMDGPU] Attempt to reschedule withou clustering
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2020-01-27 10:27:16 -08:00 |
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LLVMBuild.txt
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…
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MIMGInstructions.td
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[AMDGPU] Add a16 feature to gfx10
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2020-02-10 09:04:23 +01:00 |
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R600.td
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…
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R600AsmPrinter.cpp
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[NFC] Fix trivial typos in comments
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2020-01-06 10:50:26 +00:00 |
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R600AsmPrinter.h
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…
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R600ClauseMergePass.cpp
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…
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R600ControlFlowFinalizer.cpp
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[AMDGPU] Split R600 and GCN subregs
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2020-02-10 08:29:56 -08:00 |
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R600Defines.h
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…
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R600EmitClauseMarkers.cpp
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…
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R600ExpandSpecialInstrs.cpp
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[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
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R600FrameLowering.cpp
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…
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R600FrameLowering.h
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[Alignment][NFC] Deprecate Align::None()
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2020-01-24 12:53:58 +01:00 |
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R600ISelLowering.cpp
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AMDGPU: Move R600 test compatability hack
|
2020-02-10 10:02:06 -08:00 |
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R600ISelLowering.h
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…
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R600InstrFormats.td
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…
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R600InstrInfo.cpp
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[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
R600InstrInfo.h
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Use MCRegister in copyPhysReg
|
2019-11-11 14:42:33 +05:30 |
|
R600Instructions.td
|
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
|
2020-02-05 00:24:07 -05:00 |
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R600MachineFunctionInfo.cpp
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…
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R600MachineFunctionInfo.h
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…
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R600MachineScheduler.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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R600MachineScheduler.h
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…
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R600OpenCLImageTypeLoweringPass.cpp
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…
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R600OptimizeVectorRegisters.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Packetizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Processors.td
|
…
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R600RegisterInfo.cpp
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[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
R600RegisterInfo.h
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
R600RegisterInfo.td
|
…
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|
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R600Schedule.td
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…
|
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|
R700Instructions.td
|
…
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SIAddIMGInit.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
SIAnnotateControlFlow.cpp
|
AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break
|
2020-02-03 07:02:05 -08:00 |
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SIDefines.h
|
[AMDGPU] Added MI bit IsDOT
|
2019-09-17 17:56:13 +00:00 |
|
SIFixSGPRCopies.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
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SIFixVGPRCopies.cpp
|
…
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SIFixupVectorISel.cpp
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…
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SIFoldOperands.cpp
|
AMDGPU: Split denormal mode tracking bits
|
2020-02-04 10:44:21 -08:00 |
|
SIFormMemoryClauses.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIFrameLowering.cpp
|
Reapply "AMDGPU: Cleanup and fix SMRD offset handling"
|
2020-01-31 06:01:28 -08:00 |
|
SIFrameLowering.h
|
[Alignment][NFC] Deprecate Align::None()
|
2020-01-24 12:53:58 +01:00 |
|
SIISelLowering.cpp
|
AMDGPU: Move R600 test compatability hack
|
2020-02-10 10:02:06 -08:00 |
|
SIISelLowering.h
|
[NFC] Introduce a type to model memory operation
|
2020-01-31 17:29:01 +01:00 |
|
SIInsertSkips.cpp
|
Resubmit: [AMDGPU] Invert the handling of skip insertion.
|
2020-01-22 13:18:32 +09:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi
|
2020-01-28 10:52:17 +00:00 |
|
SIInstrFormats.td
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
|
SIInstrInfo.cpp
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
|
SIInstrInfo.h
|
[AMDGPU] Cleanup assumptions about generated subregs
|
2020-02-06 17:39:24 -08:00 |
|
SIInstrInfo.td
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
|
SIInstructions.td
|
AMDGPU: Remove dead kill handling
|
2020-02-09 17:59:24 -05:00 |
|
SILoadStoreOptimizer.cpp
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
|
SILowerControlFlow.cpp
|
AMDGPU: Fix SI_IF lowering when the save exec reg has terminator uses
|
2020-02-09 17:59:19 -05:00 |
|
SILowerI1Copies.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SILowerSGPRSpills.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
|
SIMachineFunctionInfo.h
|
AMDGPU: Split denormal mode tracking bits
|
2020-02-04 10:44:21 -08:00 |
|
SIMachineScheduler.cpp
|
[AMDGPU] override isHighLatencyDef
|
2020-01-29 08:01:29 -08:00 |
|
SIMachineScheduler.h
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
|
SIMemoryLegalizer.cpp
|
[AMDGPU] Bundle loads before post-RA scheduler
|
2020-01-24 11:33:38 -08:00 |
|
SIModeRegister.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Use Register
|
2019-12-27 16:53:21 -05:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIPeepholeSDWA.cpp
|
AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA
|
2019-12-02 12:08:49 +00:00 |
|
SIPostRABundler.cpp
|
[AMDGPU] Bundle loads before post-RA scheduler
|
2020-01-24 11:33:38 -08:00 |
|
SIPreAllocateWWMRegs.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIProgramInfo.h
|
[AMDGPU] separate accounting for agprs
|
2019-10-02 00:26:58 +00:00 |
|
SIRegisterInfo.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
SIRegisterInfo.h
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
SIRegisterInfo.td
|
AMDGPU: Make LDS_DIRECT an artifical register
|
2020-02-05 17:47:22 -05:00 |
|
SIRemoveShortExecBranches.cpp
|
[AMDGPU] Don't remove short branches over kills
|
2020-02-03 09:26:52 +00:00 |
|
SISchedule.td
|
…
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SIShrinkInstructions.cpp
|
AMDGPU: Limit the search in finding the instruction pattern for v_swap generation.
|
2020-02-07 11:06:33 -08:00 |
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SIWholeQuadMode.cpp
|
[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM lowering.
|
2020-01-10 23:01:19 -05:00 |
|
SMInstructions.td
|
AMDGPU: Cleanup SMRD buffer selection
|
2020-02-04 10:28:08 -08:00 |
|
SOPInstructions.td
|
[AMDGPU] fixed divergence driven shift operations selection
|
2020-01-31 20:49:56 +03:00 |
|
VIInstrFormats.td
|
…
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VIInstructions.td
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…
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VOP1Instructions.td
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AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp
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2020-01-22 11:43:53 -05:00 |
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VOP2Instructions.td
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[AMDGPU] fixed divergence driven shift operations selection
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2020-01-31 20:49:56 +03:00 |
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VOP3Instructions.td
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[AMDGPU] fixed divergence driven shift operations selection
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2020-01-31 20:49:56 +03:00 |
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VOP3PInstructions.td
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AMDGPU/GlobalISel: Select permlane16/permlanex16
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2020-01-29 17:55:31 -05:00 |
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VOPCInstructions.td
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
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VOPInstructions.td
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[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
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2019-09-26 21:06:17 +00:00 |
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