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llvm-project/llvm/test/MC/AVR
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Ayke van Laethem 4f6d7985d4
[AVR] Add register aliases XL, YH, etc 
These aliases are sometimes used in assembly code and make the code more
readable. They are supported by avr-gcc too.

Differential Revision: https://reviews.llvm.org/D96492
 		2021-03-03 15:36:05 +01:00
..
out-of-range-fixups
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dwarf-asm-no-code.s
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hex-immediates.s [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex 2020-07-12 08:14:52 -07:00
inst-adc.s
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inst-add.s
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inst-adiw.s [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
inst-and.s
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inst-andi.s
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inst-asr.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-bld.s
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inst-brbc.s
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inst-brbs.s
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inst-break.s
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inst-bst.s
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inst-call.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-cbi.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-cbr.s
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inst-clr.s
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inst-com.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-cp.s
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inst-cpc.s
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inst-cpi.s
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inst-cpse.s
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inst-dec.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-des.s
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inst-eicall.s
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inst-eijmp.s
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inst-elpm.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-eor.s
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inst-family-cond-branch.s
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inst-family-set-clr-flag.s
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inst-fmul.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-fmuls.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-fmulsu.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-icall.s
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inst-ijmp.s
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inst-in.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-inc.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-jmp.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-lac.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-las.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-lat.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-ld.s
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inst-ldd.s
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inst-ldi.s
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inst-lds.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-lpm.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-lsl.s
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inst-lsr.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-mov.s
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inst-movw.s [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
inst-mul.s
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inst-muls.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-mulsu.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-neg.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-nop.s
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inst-or.s
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inst-ori.s
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inst-out.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-pop.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-push.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-rcall.s
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inst-ret.s
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inst-reti.s
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inst-rjmp.s
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inst-rol.s
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inst-ror.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-sbc.s
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inst-sbci.s
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inst-sbi.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-sbic.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-sbis.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-sbiw.s [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
inst-sbr.s
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inst-sbrc.s
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inst-sbrs.s
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inst-ser.s
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inst-sleep.s
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inst-spm.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-st.s
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inst-std.s
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inst-sts.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-sub.s
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inst-subi.s
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inst-swap.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-tst.s
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inst-wdr.s
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inst-xch.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
lit.local.cfg
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modifiers.s
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registers.s [AVR] Add register aliases XL, YH, etc 2021-03-03 15:36:05 +01:00
relocations-abs.s
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relocations.s [AVR] Fix global references to function symbols 2021-02-10 00:40:49 +13:00
symbol_relocation.s
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syntax-reg-int-literal.s
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syntax-reg-pair.s
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