forked from OSchip/llvm-project
58 lines
1.4 KiB
LLVM
58 lines
1.4 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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@data1 = external global [2 x [31 x i8]], align 8
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@data2 = external global [2 x [91 x i8]], align 8
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; CHECK-LABEL: Prefer_M4_or_andn:
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; CHECK: r2 |= and(r0,~r1)
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define i32 @Prefer_M4_or_andn(i32 %a0, i32 %a1, i32 %a2) #0 {
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b3:
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%v4 = xor i32 %a1, -1
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%v5 = shl i32 %a2, 5
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%v6 = and i32 %a0, %v4
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%v7 = or i32 %v6, %v5
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ret i32 %v7
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}
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; CHECK-LABEL: Prefer_M4_mpyri_addi:
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; CHECK: add(##data1,mpyi(r0,#31))
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define i32 @Prefer_M4_mpyri_addi(i32 %a0) #0 {
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b1:
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%v2 = getelementptr inbounds [2 x [31 x i8]], [2 x [31 x i8]]* @data1, i32 0, i32 %a0
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%v3 = ptrtoint [31 x i8]* %v2 to i32
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ret i32 %v3
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}
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; CHECK-LABEL: Prefer_M4_mpyrr_addi:
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; CHECK: add(##data2,mpyi(r0,r1))
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define i32 @Prefer_M4_mpyrr_addi(i32 %a0) #0 {
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b1:
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%v2 = getelementptr inbounds [2 x [91 x i8]], [2 x [91 x i8]]* @data2, i32 0, i32 %a0
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%v3 = ptrtoint [91 x i8]* %v2 to i32
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ret i32 %v3
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}
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; CHECK-LABEL: Prefer_S2_tstbit_r:
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; CHECK: p0 = tstbit(r0,r1)
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define i32 @Prefer_S2_tstbit_r(i32 %a0, i32 %a1) #0 {
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b2:
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%v3 = shl i32 1, %a1
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%v4 = and i32 %a0, %v3
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%v5 = icmp ne i32 %v4, 0
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%v6 = zext i1 %v5 to i32
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ret i32 %v6
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}
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; CHECK-LABEL: Prefer_S2_ntstbit_r:
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; CHECK: p0 = !tstbit(r0,r1)
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define i32 @Prefer_S2_ntstbit_r(i32 %a0, i32 %a1) #0 {
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b2:
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%v3 = shl i32 1, %a1
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%v4 = and i32 %a0, %v3
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%v5 = icmp eq i32 %v4, 0
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%v6 = zext i1 %v5 to i32
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ret i32 %v6
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}
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attributes #0 = { nounwind readnone }
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