forked from OSchip/llvm-project
144 lines
4.5 KiB
YAML
144 lines
4.5 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=tonga -run-pass=gcn-dpp-combine -o - %s | FileCheck %s
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# test if $old definition is correctly tracked through subreg manipulation pseudos
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---
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# CHECK-LABEL: name: mul_old_subreg
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# CHECK: %7:vgpr_32 = V_MUL_I32_I24_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
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name: mul_old_subreg
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vreg_64 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: vreg_64 }
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- { id: 5, class: vreg_64 }
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- { id: 6, class: vgpr_32 }
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- { id: 7, class: vgpr_32 }
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liveins:
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- { reg: '$vgpr0', virtual-reg: '%0' }
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- { reg: '$vgpr1', virtual-reg: '%1' }
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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%0:vreg_64 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
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%3:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
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%4 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1
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%5 = INSERT_SUBREG %4, %1, %subreg.sub1 ; %5.sub0 is taken from %4
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%6:vgpr_32 = V_MOV_B32_dpp %5.sub0, %1, 1, 1, 1, 0, implicit $exec
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%7:vgpr_32 = V_MUL_I32_I24_e32 %6, %0.sub1, implicit $exec
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...
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# CHECK-LABEL: name: add_old_subreg
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# CHECK: [[OLD:\%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# CHECK: %5:vgpr_32 = V_ADD_U32_dpp [[OLD]], %1, %0.sub1, 1, 1, 1, 1, implicit $exec
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name: add_old_subreg
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vreg_64 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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- { id: 3, class: vreg_64 }
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- { id: 4, class: vgpr_32 }
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- { id: 5, class: vgpr_32 }
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liveins:
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- { reg: '$vgpr0', virtual-reg: '%0' }
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- { reg: '$vgpr1', virtual-reg: '%1' }
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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%0:vreg_64 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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%3:vreg_64 = INSERT_SUBREG %0, %2, %subreg.sub1 ; %3.sub1 is inserted
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%4:vgpr_32 = V_MOV_B32_dpp %3.sub1, %1, 1, 1, 1, 0, implicit $exec
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%5:vgpr_32 = V_ADD_U32_e32 %4, %0.sub1, implicit $exec
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...
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# CHECK-LABEL: name: add_old_subreg_undef
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# CHECK: %5:vgpr_32 = V_ADD_U32_dpp %3.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
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name: add_old_subreg_undef
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vreg_64 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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- { id: 3, class: vreg_64 }
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- { id: 4, class: vgpr_32 }
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- { id: 5, class: vgpr_32 }
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liveins:
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- { reg: '$vgpr0', virtual-reg: '%0' }
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- { reg: '$vgpr1', virtual-reg: '%1' }
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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%0:vreg_64 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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%3:vreg_64 = REG_SEQUENCE %2, %subreg.sub0 ; %3.sub1 is undef
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%4:vgpr_32 = V_MOV_B32_dpp %3.sub1, %1, 1, 1, 1, 0, implicit $exec
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%5:vgpr_32 = V_ADD_U32_e32 %4, %0.sub1, implicit $exec
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...
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# CHECK-LABEL: name: add_f32_e64
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# CHECK: %3:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 1, 1, 1, implicit $exec
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# CHECK: %4:vgpr_32 = V_ADD_F32_e64 0, %3, 0, %0, 0, 1, implicit $exec
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# CHECK: %6:vgpr_32 = V_ADD_F32_dpp %2, 0, %1, 0, %0, 1, 1, 1, 1, implicit $exec
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# CHECK: %7:vgpr_32 = V_ADD_F32_dpp %2, 1, %1, 2, %0, 1, 1, 1, 1, implicit $exec
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# CHECK: %9:vgpr_32 = V_ADD_F32_e64 4, %8, 8, %0, 0, 0, implicit $exec
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name: add_f32_e64
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vgpr_32 }
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- { id: 1, class: vgpr_32 }
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- { id: 2, class: vgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: vgpr_32 }
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- { id: 5, class: vgpr_32 }
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- { id: 6, class: vgpr_32 }
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- { id: 7, class: vgpr_32 }
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- { id: 8, class: vgpr_32 }
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- { id: 9, class: vgpr_32 }
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liveins:
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- { reg: '$vgpr0', virtual-reg: '%0' }
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- { reg: '$vgpr1', virtual-reg: '%1' }
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vgpr_32 = IMPLICIT_DEF
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%3:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 1, 1, 1, implicit $exec
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; this shouldn't be combined as omod is set
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%4:vgpr_32 = V_ADD_F32_e64 0, %3, 0, %0, 0, 1, implicit $exec
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%5:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 1, 1, 1, implicit $exec
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; this should be combined as all modifiers are default
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%6:vgpr_32 = V_ADD_F32_e64 0, %5, 0, %0, 0, 0, implicit $exec
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; this should be combined as modifiers other than abs|neg are default
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%7:vgpr_32 = V_ADD_F32_e64 1, %5, 2, %0, 0, 0, implicit $exec
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%8:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 1, 1, 1, implicit $exec
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; this shouldn't be combined as modifiers aren't abs|neg
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%9:vgpr_32 = V_ADD_F32_e64 4, %8, 8, %0, 0, 0, implicit $exec
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...
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