forked from OSchip/llvm-project
97 lines
3.0 KiB
C++
97 lines
3.0 KiB
C++
//===--- SIDebuggerInsertNops.cpp - Inserts nops for debugger usage -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Inserts one nop instruction for each high level source statement for
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/// debugger usage.
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///
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/// Tools, such as a debugger, need to pause execution based on user input (i.e.
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/// breakpoint). In order to do this, one nop instruction is inserted before the
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/// first isa instruction of each high level source statement. Further, the
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/// debugger may replace nop instructions with trap instructions based on user
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/// input.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUSubtarget.h"
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#include "SIInstrInfo.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "si-debugger-insert-nops"
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#define PASS_NAME "SI Debugger Insert Nops"
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namespace {
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class SIDebuggerInsertNops : public MachineFunctionPass {
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public:
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static char ID;
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SIDebuggerInsertNops() : MachineFunctionPass(ID) { }
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StringRef getPassName() const override { return PASS_NAME; }
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // anonymous namespace
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INITIALIZE_PASS(SIDebuggerInsertNops, DEBUG_TYPE, PASS_NAME, false, false)
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char SIDebuggerInsertNops::ID = 0;
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char &llvm::SIDebuggerInsertNopsID = SIDebuggerInsertNops::ID;
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FunctionPass *llvm::createSIDebuggerInsertNopsPass() {
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return new SIDebuggerInsertNops();
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}
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bool SIDebuggerInsertNops::runOnMachineFunction(MachineFunction &MF) {
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// Skip this pass if "amdgpu-debugger-insert-nops" attribute was not
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// specified.
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const SISubtarget &ST = MF.getSubtarget<SISubtarget>();
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if (!ST.debuggerInsertNops())
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return false;
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// Skip machine functions without debug info.
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if (!MF.getMMI().hasDebugInfo())
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return false;
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// Target instruction info.
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const SIInstrInfo *TII = ST.getInstrInfo();
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// Set containing line numbers that have nop inserted.
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DenseSet<unsigned> NopInserted;
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for (auto &MBB : MF) {
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for (auto MI = MBB.begin(); MI != MBB.end(); ++MI) {
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// Skip DBG_VALUE instructions and instructions without location.
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if (MI->isDebugValue() || !MI->getDebugLoc())
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continue;
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// Insert nop instruction if line number does not have nop inserted.
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auto DL = MI->getDebugLoc();
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if (NopInserted.find(DL.getLine()) == NopInserted.end()) {
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BuildMI(MBB, *MI, DL, TII->get(AMDGPU::S_NOP))
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.addImm(0);
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NopInserted.insert(DL.getLine());
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}
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}
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}
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return true;
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}
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