llvm-project/llvm/test/CodeGen
Jan Vesely 25f362766e R600: Implement 64bit SHL
v2: Use c++ style comment

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 211157
2014-06-18 12:27:13 +00:00
..
AArch64 [AArch64] Fix a pattern match failure caused by creating improper CONCAT_VECTOR. 2014-06-18 05:54:42 +00:00
ARM ARM: implement correct atomic operations on v7M 2014-06-16 18:49:36 +00:00
CPP IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Generic Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute. 2014-06-05 19:29:43 +00:00
Hexagon Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
MSP430 Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Mips Add load/store functionality 2014-06-16 22:05:47 +00:00
NVPTX Canonicalize addrspacecast ConstExpr between different pointer types 2014-06-15 21:40:57 +00:00
PowerPC [PPC64] Fix PR19893 - improve code generation for local function addresses 2014-06-16 21:36:02 +00:00
R600 R600: Implement 64bit SHL 2014-06-18 12:27:13 +00:00
SPARC IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
SystemZ IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Thumb ARM: Fix fastcc calling convention for Thumb1 2014-06-13 08:33:03 +00:00
Thumb2 Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
X86 DAG: move sret demotion into most basic LowerCallTo implementation. 2014-06-18 11:52:44 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00