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<h1>Polly - GPGPU Code Generation</h1>
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<!--*********************************************************************-->
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<p><em>WARNING: This project was part of the Google Summer of Code 2012.
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It is currently not finished, but it is in the design and implementation stage.
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The ideas/plans described here may not yet be implemented in Polly and may
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change later on.</em></p>
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This project adds GPGPU code generation feature to Polly.
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<h2>Objective</h2>
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<p>The overall objective of this GSoC project is to create a preliminary
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implementation of GPGPU code generation for Polly. With this addition, users
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can parallelize some perfectly nested loops with Polly to execute on a
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heterogeneous platform, composed of CPU and GPU.</p>
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<p>There are several successful projects about automatic source-to-source gpu
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code transformation. C-to-CUDA[1] uses the standard Pluto algorithms for
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computing an affine schedule and then applies a wavefront transformation to
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obtain one sequential and n-1 parallel loops. The parallel loops are then
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mapped onto the blocks and threads of GPU. PPCG[2] introduces some advanced
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algorithms which can expose much more parallelism than other methods . And It
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also introduces affine partition heuristics and code generation algorithms
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for locality enhancement in the registers and shared memory.</p>
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<p>Since automatic GPGPU code generation is quite a complex problem and what we
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target is a low-level intermediate representation, LLVM IR, rather than a
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high-level language source, it is important for us to set a proper objective
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as a start step to give a complete solution to GPGPU code generation for LLVM
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IR.</p>
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<p>Firstly, we plan to target two kinds of relatively simple test cases. One is
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comprised of pure parallel and perfectly nested loops, like the following
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code.</p>
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<pre>
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parfor(int i=0 to M)
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parfor(int j=0 to N)
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LoopBody(i, j);
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</pre>
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<p>Another one is that all the loops in it are parallel except the inner-most
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one, just like this:</p>
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<pre>
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parfor(int i=0 to M)
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parfor(int j=0 to N)
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non-parfor(int k=0 to K)
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LoopBody(i, j, k);
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</pre>
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<p>The LoopBody part should be limited to instructions or functions calls
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(intrinsics) which can be handled by LLVM's NVPTX backend.</p>
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<p>On the other hand, we focus on building a preliminary and scalable framework
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of GPGPU code generation for polly. Thus we plan to employ relatively simple
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tiling and mapping algorithms and optimize them later.</p>
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<h2>Work Flow</h2>
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<h3>GPGPU Code Generation In General</h3>
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<p>C-to-CUDA[1] and PPCG[2] propose similar steps to solve the automatic GPGPU
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code generation problem.</p>
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<li>Look for parallel loops.</li>
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<li>Create a polyhedral model from the loops.</li>
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<li>Tile and map the loops to GPU blocks and threads.</li>
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<li>Determine where to place the data.</li>
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<h3>What has been done in Polly</h3>
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<p>Polly has implemented the 1st, 2nd and part of the 3rd of the above steps and
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many other analysis and transformation passes.</p>
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<h3>What to do in Polly</h3>
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<p>Unlike many source-to-source optimizers such as C-to-CUDA and PPCG, Polly is
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a low-level optimizer, which means we can't use a source-level compiler
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(e.g. NVCC) to generate the final assembly for the device. We need manually
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insert device driver API calls to execute the generated kernel assembly
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text.</p>
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<p>In this project, we assume that the device driver library has provided an
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interface to launch kernels in the form of assembly text. Fortunately, most
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of the mainstream GPU vendors provide such a feature in their products (see
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ptxjit of NVIDIA GPUs and CAL of AMD GPUs). Generally speaking, what we
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are going to do in Polly is:</p>
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<li>Find a way to tile the parallel loops.</li>
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<li>Find a way to extract the loop body and transform it into thread-centric
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parallel code.</li>
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<li>Find a way to store/load the thread-centric code into/from a device module.
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<li>Find a way to pass the target machine information and generate code of the
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device module for the target.
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<li>Find a way to map the tiled loop to GPU blocks and threads.</li>
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<li>Find a way to insert CUDA synchronization operations on-demand.
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<li>Find a way to generate the memory copy operations between a host and a
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device.</li>
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<li>Implement/Wrap a runtime library to serve as the execution engine for the
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generated device code.</li>
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<h3>The Work Flow</h3>
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<p>In this section, we assume that the host cpu is X86 and the device is NVIDIA
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CUDA-compatible. we will use the following test case to describe our work
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flow.</p>
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<pre>
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for(i = 0; i < 128; i++)
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for(j = 0; j < 128; j++)
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A[i][j] = i*128 + j;
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</pre>
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<p>The work flow of our code generator is as follows.</p>
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<p>1.We first use Polly's jscop file importer to get a wanted 4-level parallel
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tiled code.</p>
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The "schedule" part of the pre-optimization jscop file is as the following:
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<pre>
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"schedule" : "{ Stmt_for_body3[i0, i1] -> schedule[0, i0, 0, i1, 0] }"
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</pre>
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The jscop file describing the tiling transformation is:
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<pre>
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"schedule" : "{ Stmt_for_body3[i0, i1] -> schedule[0, o0, o1, o2, o3]:
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o0 >= 0 and o0 <= 7 and o1 >= 0 and o1 <= 15 and
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o2 >= 0 and o2 <= 7 and o3 >= 0 and o3 <= 15 and
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i0 = 16o0 + o1 and i1 = 16o2 + o3 }"
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</pre>
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We can test the schedule with the following command line.
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<pre>
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opt -load /path/to/polly/build/LLVMPolly.so -basic-aa -polly-import-jscop
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-polly-ast -analyze -q ./test.ll
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-polly-import-jscop-postfix=transformed+gpu
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</pre>
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The output of this schedule is:
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<pre>
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for (c2=0;c2<=7;c2++) {
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for (c3=0;c3<=15;c3++) {
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for (c4=0;c4<=7;c4++) {
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for (c5=0;c5<=15;c5++) {
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Stmt_for_body3(16*c2+c3,16*c4+c5);
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}
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}
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}
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}
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</pre>
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Now we get a 4-dimensional parallel loops with a single SCoP statement in it.
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<p>2.We then extract the loop body (or the inner-most non-parallel loop) into a
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LLVM function, tagging it with PTX_Kernel call convention.</p>
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<p>3.We extract the PTX_kernel function into a temporary module, set the target
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triple (e.g. nvptx64-unknown-linux) for the module, transform the temporary
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module into a string, store it in the original module and erase the
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PTX_kernel function.</p>
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<p>4.We replace the loops with their GPGPU counterpart. The GPGPU part of code
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is composed of a call to the llvm.codegen intrinsic and function calls to our
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GPU runtime library.</p>
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<p>5.Finally, we generate the executable program with <em>llc</em> or run the
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optimized LLVM IRs with a JIT compiler like <em>lli</em>.</p>
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<h2>Usage</h2>
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<p>1. Apply the llvm.codegen intrinsic patch to LLVM code base.</p>
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<pre>cd /path/to/llvm/source
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git am /path/to/polly/source/utils/0001-Add-llvm.codegen-intrinsic.patch</pre>
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<p>2. Build the test case.</p>
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<pre>/path/to/polly/source/test/create_ll.sh test.c</pre>
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<p>3. Get and edit the jscop file (take function "gpu_codegen" as an example).
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</p>
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<pre>opt -load /path/to/polly/build/lib/LLVMPolly.so -basic-aa
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-polly-export-jscop ./test.ll
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cp gpu_codegen___%for.cond---%for.end8.jscop
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gpu_codegen___%for.cond---%for.end8.jscop.transformed+gpu
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vi gpu_codegen___%for.cond---%for.end8.jscop.transformed+gpu</pre>
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<p><em>(Please refer to section "The Work Flow" on how to edit the "schedule"
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part of a statement)</em></p>
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<p>4. Optimize the code with GPGPU code generation.</p>
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<pre>opt -load /path/to/polly/build/lib/LLVMPolly.so -basic-aa
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-polly-import-jscop-postfix=transformed+gpu -enable-polly-gpgpu
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-polly-gpgpu-triple=nvptx64-unknown-unknown -polly-codegen ./test.ll -S
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-o test.gpued.ll</pre>
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<p>5. Build the final assembly and executable.</p>
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<pre>llc test.gpued.ll -o test.s
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gcc test.s -lGPURuntime -o test</pre>
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<p><em>(Please make sure that LD_LIBRARY_PATH is set properly so that
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/path/to/polly/build/lib/libGPURuntime.so is visible to gcc.)</em></p>
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<h2>TODO List</h2>
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<table class="wikitable" cellpadding="2">
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<tbody>
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<tr style="background: rgb(239, 239, 239)">
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<th width="400px"> Tasks</th>
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<th width="150px"> Status </th>
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<th> Owner </th>
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</tr>
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<tr>
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<th align="left">Tiling the Parallel Loops with An External Jscop File</th>
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<td align="center" class='open'>Open, In Design</td>
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<td>Yabin Hu</td>
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</tr>
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<tr>
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<th align="left">GPU Runtime Library Implementation</th>
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<td align="center" class='inprogress'>Coding Finished, In Reviewing</td>
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<td></td>
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</tr>
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<tr>
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<th align="left">llvm.codegen Intrinsic Implementation</th>
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<td align="center" class='inprogress'>Codeing Finished, To Be Reviewed</td>
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<td></td>
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</tr>
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<tr>
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<th align="left">Code Generation For Host</th>
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<td align="center" class='inprogress'>50% Done</td>
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<td></td>
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</tr>
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</tbody></table>
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<h2>References</h2>
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<li type="1" value="1">
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<em>Automatic C-to-CUDA Code Generation for Affine Programs. </em><br />
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Muthu Manikandan Baskaran, J. Ramanujam and P. Sadayappan.<br />
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International Conference on Compiler Construction (CC) 2010.<br />
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</li>
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<li type="1"><em>PPCG Project</em><br />
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<a href="http://freecode.com/projects/ppcg">http://freecode.com/projects/ppcg
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</a></li>
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<li type="1">
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<em>Where is the Data? Why You Cannot Debate GPU vs. CPU Performance Without the
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Answer. </em><br />
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Chris Gregg and Kim Hazelwood<br />
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International Symposium on Performance Analysis of Systems and Software
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(ISPASS) 2011.
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</li>
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<p></p>
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