forked from OSchip/llvm-project
222 lines
3.8 KiB
LLVM
222 lines
3.8 KiB
LLVM
; RUN: opt < %s -simplifycfg -S | FileCheck %s
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target datalayout = "e-n32"
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; CHECK-LABEL: @test1
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; CHECK: %[[SUB:.*]] = sub i32 %a, 97
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; CHECK: %[[LSHR:.*]] = lshr i32 %[[SUB]], 2
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; CHECK: %[[SHL:.*]] = shl i32 %[[SUB]], 30
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; CHECK: %[[OR:.*]] = or i32 %[[LSHR]], %[[SHL]]
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; CHECK: switch i32 %[[OR]], label %def [
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; CHECK: i32 0, label %one
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; CHECK: i32 1, label %two
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; CHECK: i32 2, label %three
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; CHECK: ]
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define i32 @test1(i32 %a) {
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switch i32 %a, label %def [
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i32 97, label %one
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i32 101, label %two
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i32 105, label %three
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i32 109, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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; Optimization shouldn't trigger; bitwidth > 64
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; CHECK-LABEL: @test2
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; CHECK: switch i128 %a, label %def
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define i128 @test2(i128 %a) {
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switch i128 %a, label %def [
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i128 97, label %one
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i128 101, label %two
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i128 105, label %three
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i128 109, label %three
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]
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def:
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ret i128 8867
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one:
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ret i128 11984
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two:
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ret i128 1143
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three:
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ret i128 99783
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}
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; Optimization shouldn't trigger; no holes present
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; CHECK-LABEL: @test3
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; CHECK: switch i32 %a, label %def
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define i32 @test3(i32 %a) {
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switch i32 %a, label %def [
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i32 97, label %one
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i32 98, label %two
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i32 99, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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; Optimization shouldn't trigger; not an arithmetic progression
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; CHECK-LABEL: @test4
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; CHECK: switch i32 %a, label %def
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define i32 @test4(i32 %a) {
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switch i32 %a, label %def [
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i32 97, label %one
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i32 102, label %two
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i32 105, label %three
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i32 109, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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; Optimization shouldn't trigger; not a power of two
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; CHECK-LABEL: @test5
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; CHECK: switch i32 %a, label %def
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define i32 @test5(i32 %a) {
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switch i32 %a, label %def [
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i32 97, label %one
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i32 102, label %two
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i32 107, label %three
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i32 112, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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; CHECK-LABEL: @test6
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; CHECK: %[[SUB:.*]] = sub i32 %a, -109
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; CHECK: %[[LSHR:.*]] = lshr i32 %[[SUB]], 2
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; CHECK: %[[SHL:.*]] = shl i32 %[[SUB]], 30
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; CHECK: %[[OR:.*]] = or i32 %[[LSHR]], %[[SHL]]
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; CHECK: switch i32 %[[OR]], label %def [
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define i32 @test6(i32 %a) optsize {
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switch i32 %a, label %def [
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i32 -97, label %one
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i32 -101, label %two
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i32 -105, label %three
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i32 -109, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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; CHECK-LABEL: @test7
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; CHECK: %[[SUB:.*]] = sub i8 %a, -36
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; CHECK: %[[LSHR:.*]] = lshr i8 %[[SUB]], 2
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; CHECK: %[[SHL:.*]] = shl i8 %[[SUB]], 6
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; CHECK: %[[OR:.*]] = or i8 %[[LSHR]], %[[SHL]]
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; CHECK: switch.tableidx = {{.*}} %[[OR]]
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define i8 @test7(i8 %a) optsize {
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switch i8 %a, label %def [
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i8 220, label %one
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i8 224, label %two
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i8 228, label %three
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i8 232, label %three
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]
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def:
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ret i8 8867
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one:
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ret i8 11984
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two:
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ret i8 1143
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three:
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ret i8 99783
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}
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; CHECK-LABEL: @test8
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; CHECK: %[[SUB:.*]] = sub i32 %a, 97
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; CHECK: %[[LSHR:.*]] = lshr i32 %1, 2
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; CHECK: %[[SHL:.*]] = shl i32 %1, 30
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; CHECK: %[[OR:.*]] = or i32 %[[LSHR]], %[[SHL]]
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; CHECK: switch i32 %[[OR]], label %def [
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define i32 @test8(i32 %a) optsize {
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switch i32 %a, label %def [
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i32 97, label %one
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i32 101, label %two
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i32 105, label %three
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i32 113, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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; CHECK-LABEL: @test9
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; CHECK: switch
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; CHECK: i32 6
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; CHECK: i32 7
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; CHECK: i32 0
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; CHECK: i32 2
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define i32 @test9(i32 %a) {
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switch i32 %a, label %def [
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i32 18, label %one
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i32 20, label %two
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i32 6, label %three
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i32 10, label %three
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]
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def:
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ret i32 8867
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one:
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ret i32 11984
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two:
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ret i32 1143
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three:
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ret i32 99783
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}
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