forked from OSchip/llvm-project
115 lines
4.7 KiB
C++
115 lines
4.7 KiB
C++
//===- BufferAliasAnalysis.cpp - Buffer alias analysis for MLIR -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Analysis/BufferAliasAnalysis.h"
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#include "mlir/Interfaces/ControlFlowInterfaces.h"
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#include "mlir/Interfaces/ViewLikeInterface.h"
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#include "llvm/ADT/SetOperations.h"
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using namespace mlir;
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/// Constructs a new alias analysis using the op provided.
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BufferAliasAnalysis::BufferAliasAnalysis(Operation *op) { build(op); }
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/// Find all immediate and indirect aliases this value could potentially
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/// have. Note that the resulting set will also contain the value provided as
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/// it is an alias of itself.
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BufferAliasAnalysis::ValueSetT
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BufferAliasAnalysis::resolve(Value rootValue) const {
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ValueSetT result;
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SmallVector<Value, 8> queue;
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queue.push_back(rootValue);
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while (!queue.empty()) {
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Value currentValue = queue.pop_back_val();
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if (result.insert(currentValue).second) {
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auto it = aliases.find(currentValue);
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if (it != aliases.end()) {
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for (Value aliasValue : it->second)
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queue.push_back(aliasValue);
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}
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}
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}
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return result;
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}
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/// Removes the given values from all alias sets.
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void BufferAliasAnalysis::remove(const SmallPtrSetImpl<Value> &aliasValues) {
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for (auto &entry : aliases)
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llvm::set_subtract(entry.second, aliasValues);
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}
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/// This function constructs a mapping from values to its immediate aliases.
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/// It iterates over all blocks, gets their predecessors, determines the
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/// values that will be passed to the corresponding block arguments and
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/// inserts them into the underlying map. Furthermore, it wires successor
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/// regions and branch-like return operations from nested regions.
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void BufferAliasAnalysis::build(Operation *op) {
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// Registers all aliases of the given values.
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auto registerAliases = [&](auto values, auto aliases) {
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for (auto entry : llvm::zip(values, aliases))
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this->aliases[std::get<0>(entry)].insert(std::get<1>(entry));
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};
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// Add additional aliases created by view changes to the alias list.
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op->walk([&](ViewLikeOpInterface viewInterface) {
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aliases[viewInterface.getViewSource()].insert(viewInterface->getResult(0));
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});
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// Query all branch interfaces to link block argument aliases.
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op->walk([&](BranchOpInterface branchInterface) {
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Block *parentBlock = branchInterface->getBlock();
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for (auto it = parentBlock->succ_begin(), e = parentBlock->succ_end();
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it != e; ++it) {
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// Query the branch op interface to get the successor operands.
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auto successorOperands =
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branchInterface.getSuccessorOperands(it.getIndex());
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if (!successorOperands.hasValue())
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continue;
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// Build the actual mapping of values to their immediate aliases.
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registerAliases(successorOperands.getValue(), (*it)->getArguments());
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}
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});
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// Query the RegionBranchOpInterface to find potential successor regions.
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op->walk([&](RegionBranchOpInterface regionInterface) {
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// Extract all entry regions and wire all initial entry successor inputs.
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SmallVector<RegionSuccessor, 2> entrySuccessors;
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regionInterface.getSuccessorRegions(/*index=*/llvm::None, entrySuccessors);
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for (RegionSuccessor &entrySuccessor : entrySuccessors) {
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// Wire the entry region's successor arguments with the initial
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// successor inputs.
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assert(entrySuccessor.getSuccessor() &&
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"Invalid entry region without an attached successor region");
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registerAliases(regionInterface.getSuccessorEntryOperands(
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entrySuccessor.getSuccessor()->getRegionNumber()),
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entrySuccessor.getSuccessorInputs());
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}
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// Wire flow between regions and from region exits.
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for (Region ®ion : regionInterface->getRegions()) {
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// Iterate over all successor region entries that are reachable from the
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// current region.
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SmallVector<RegionSuccessor, 2> successorRegions;
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regionInterface.getSuccessorRegions(region.getRegionNumber(),
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successorRegions);
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for (RegionSuccessor &successorRegion : successorRegions) {
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// Iterate over all immediate terminator operations and wire the
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// successor inputs with the operands of each terminator.
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for (Block &block : region) {
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for (Operation &operation : block) {
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if (operation.hasTrait<OpTrait::ReturnLike>())
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registerAliases(operation.getOperands(),
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successorRegion.getSuccessorInputs());
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}
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}
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}
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}
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});
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}
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