llvm-project/mlir/lib
lorenzo chelini 0a74a7161b [mlir] scf::ForOp: Drop iter arguments (and corresponding result) with no use
'ForOpIterArgsFolder' can now remove iterator arguments (and corresponding
results) with no use.

Example:

```
%cst = constant 32 : i32

%0:2 = scf.for %arg1 = %lb to %ub step %step iter_args(%arg2 = %arg0, %arg3 = %cst)
  -> (i32, i32) {
  %1 = addu %arg2, %cst : i32
  scf.yield %1, %1 : i32, i32
}

use(%0#0)

```

%arg3 is not used in the block, and its corresponding result `%0#1` has no use,
thus remove the iter argument.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D98711
2021-03-17 12:06:17 +00:00
..
Analysis [mlir] fix a memory leak in NestedPattern 2021-03-12 18:52:14 +01:00
Bindings [mlir] enable Python bindings for the MemRef dialect 2021-03-15 14:07:51 +01:00
CAPI [mlir] Model MemRef memory space as Attribute 2021-03-10 12:57:27 +03:00
Conversion [mlir][llvm] Pass struct results as parameter in c wrapper 2021-03-17 12:58:52 +01:00
Dialect [mlir] scf::ForOp: Drop iter arguments (and corresponding result) with no use 2021-03-17 12:06:17 +00:00
EDSC [mlir][IR] Remove the concept of `OperationProperties` 2021-02-09 12:00:15 -08:00
ExecutionEngine [mlir] Remove uses of type-less CreateLoad() APIs (NFC) 2021-03-11 18:39:20 +01:00
IR [mlir][IR] Move the remaining builtin attributes to ODS. 2021-03-16 16:31:53 -07:00
Interfaces [mlir] Introduce data layout modeling subsystem 2021-03-11 16:54:47 +01:00
Parser [mlir][IR] Move the remaining builtin attributes to ODS. 2021-03-16 16:31:53 -07:00
Pass Enable `Pass::initialize()` to fail by returning a LogicalResult 2021-02-11 01:51:53 +00:00
Reducer [mlir] NFC: fix trivial typos 2020-10-29 04:05:22 +09:00
Rewrite [mlir][PDL] Add support for variadic operands and results in the PDL byte code 2021-03-16 13:20:19 -07:00
Support [mlir][StorageUniquer] Properly call the destructor on non-trivially destructible storage instances 2021-03-11 11:35:32 -08:00
TableGen [mlir][IR] Move the remaining builtin attributes to ODS. 2021-03-16 16:31:53 -07:00
Target [mlir][amx] Add Intel AMX dialect (architectural-specific vector dialect) 2021-03-15 17:59:05 -07:00
Transforms [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
Translation [mlir] avoid exposing mutable DialectRegistry from MLIRContext 2021-02-10 12:07:34 +01:00
CMakeLists.txt [mlir][NFC] Move around the code related to PatternRewriting to improve layering 2020-10-26 18:01:06 -07:00