forked from OSchip/llvm-project
44 lines
1.7 KiB
LLVM
44 lines
1.7 KiB
LLVM
; RUN: opt < %s -loop-reduce -S | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv7m-arm-none-eabi"
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; Check that the IV updates (incdec.ptr{,1,2}) are kept in the latch block
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; and not moved to the header/exiting block. Inserting them in the header
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; doubles register pressure and adds moves.
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; CHECK-LABEL: @f
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; CHECK: while.cond:
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; CHECK: icmp sgt i32 %n.addr.0, 0
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; CHECK: while.body:
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; CHECK: incdec.ptr =
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; CHECK: incdec.ptr1 =
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; CHECK: incdec.ptr2 =
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; CHECK: dec =
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define void @f(float* nocapture readonly %a, float* nocapture readonly %b, float* nocapture %c, i32 %n) {
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entry:
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br label %while.cond
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while.cond: ; preds = %while.body, %entry
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%a.addr.0 = phi float* [ %a, %entry ], [ %incdec.ptr, %while.body ]
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%b.addr.0 = phi float* [ %b, %entry ], [ %incdec.ptr1, %while.body ]
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%c.addr.0 = phi float* [ %c, %entry ], [ %incdec.ptr2, %while.body ]
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%n.addr.0 = phi i32 [ %n, %entry ], [ %dec, %while.body ]
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%cmp = icmp sgt i32 %n.addr.0, 0
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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%incdec.ptr = getelementptr inbounds float, float* %a.addr.0, i32 1
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%tmp = load float, float* %a.addr.0, align 4
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%incdec.ptr1 = getelementptr inbounds float, float* %b.addr.0, i32 1
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%tmp1 = load float, float* %b.addr.0, align 4
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%add = fadd float %tmp, %tmp1
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%incdec.ptr2 = getelementptr inbounds float, float* %c.addr.0, i32 1
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store float %add, float* %c.addr.0, align 4
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%dec = add nsw i32 %n.addr.0, -1
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br label %while.cond
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while.end: ; preds = %while.cond
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ret void
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}
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