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Fangrui Song ddc57afab9 [ELF][RISCV] Support GD/LD/IE/LE TLS models 
RISC-V psABI doesn't specify TLS relaxation. It can be handled the same
way as we handle ARM TLS. RISC-V TLS is even simpler because GD/LD use
the same relocation type.

Reviewed By: jrtc27, ruiu

Differential Revision: https://reviews.llvm.org/D63220

llvm-svn: 364813
 		2019-07-01 17:12:26 +00:00
..
AArch64.cpp [ELF][ARM][AARCH64][MIPS][PPC] Simplify the logic to create R_*_RELATIVE for absolute relocation types in writable sections 2019-06-20 14:00:08 +00:00
AMDGPU.cpp [ELF][ARM][AARCH64][MIPS][PPC] Simplify the logic to create R_*_RELATIVE for absolute relocation types in writable sections 2019-06-20 14:00:08 +00:00
ARM.cpp [ELF][ARM] Merge handleARMTlsRelocation() into handleTlsRelocation() 2019-06-20 13:53:11 +00:00
AVR.cpp [LLD][ELF] - Improve diagnostic about unrecognized relocations. 2019-05-23 09:50:18 +00:00
Hexagon.cpp [ELF] Make the rule to create relative relocations in a writable section stricter 2019-06-11 12:59:30 +00:00
MSP430.cpp [LLD][ELF] - Improve diagnostic about unrecognized relocations. 2019-05-23 09:50:18 +00:00
Mips.cpp [ELF][ARM][AARCH64][MIPS][PPC] Simplify the logic to create R_*_RELATIVE for absolute relocation types in writable sections 2019-06-20 14:00:08 +00:00
MipsArchTree.cpp ELF: De-template ELFFileBase. NFCI. 2019-04-05 20:16:26 +00:00
PPC.cpp [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows for R_PPC_ADDR16, R_PPC64_ADDR{16,32}, R_X86_64_{8,16} 2019-06-24 05:37:20 +00:00
PPC64.cpp [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows for R_PPC_ADDR16, R_PPC64_ADDR{16,32}, R_X86_64_{8,16} 2019-06-24 05:37:20 +00:00
RISCV.cpp [ELF][RISCV] Support GD/LD/IE/LE TLS models 2019-07-01 17:12:26 +00:00
SPARCV9.cpp [ELF] Make the rule to create relative relocations in a writable section stricter 2019-06-11 12:59:30 +00:00
X86.cpp [ELF] Make the rule to create relative relocations in a writable section stricter 2019-06-11 12:59:30 +00:00
X86_64.cpp [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows for R_PPC_ADDR16, R_PPC64_ADDR{16,32}, R_X86_64_{8,16} 2019-06-24 05:37:20 +00:00