llvm-project/mlir/test/Target
Nicolas Vasilache 047400ed82 [mlir][LLVMIR] Add support for InlineAsmOp
The InlineAsmOp mirrors the underlying LLVM semantics with a notable
exception: the embedded `asm_string` is not allowed to define or reference
any symbol or any global variable: only the operands of the op may be read,
written, or referenced.
Attempting to define or reference any symbol or any global behavior is
considered undefined behavior at this time.

The asm dialect syntax is currently specified with an integer (0 [default] for the "att dialect", 1 for the intel dialect) to circumvent the ODS limitation on string enums.

Translation to LLVM is provided and raises the fact that the asm constraints string must be well-formed with respect to in/out operands. No check is performed on the asm_string.

An InlineAsm instruction in LLVM is a special call operation to a function that is constructed on the fly.
It does not fit the current model of MLIR calls with symbols.
As a consequence, the current implementation constructs the function type in ModuleTranslation.cpp.
This should be refactored in the future.

The mlir-cpu-runner is augmented with the global initialization of the X86 asm parser to allow proper execution in JIT mode. Previously, only the X86 asm printer was initialized.

Differential revision: https://reviews.llvm.org/D92166
2020-11-30 08:32:02 +00:00
..
avx512.mlir [mlir] switch the modeling of LLVM types to use the new mechanism 2020-08-04 14:29:25 +02:00
import.ll [mlir] use the new stateful LLVM type translator by default 2020-08-06 00:36:33 +02:00
llvmir-debug.mlir [MLIR] Avoid adding debuginfo for a function if it contains calls that has no debug info. 2020-09-29 13:51:56 -07:00
llvmir-intrinsics.mlir [mlir][TableGen] Support intrinsics with multiple returns and overloaded operands. 2020-11-19 09:59:42 +01:00
llvmir-invalid.mlir [mlir] switch the modeling of LLVM types to use the new mechanism 2020-08-04 14:29:25 +02:00
llvmir-types.mlir [mlir] NFC: fix trivial typo under test and tools 2020-08-27 15:37:42 +09:00
llvmir.mlir [mlir][LLVMIR] Add support for InlineAsmOp 2020-11-30 08:32:02 +00:00
nvvmir.mlir [mlir] switch the modeling of LLVM types to use the new mechanism 2020-08-04 14:29:25 +02:00
openmp-llvm.mlir [OpenMP][MLIR] Fix for nested parallel regions 2020-10-19 08:45:50 +01:00
rocdl.mlir [mlir] switch the modeling of LLVM types to use the new mechanism 2020-08-04 14:29:25 +02:00
vector-to-llvm-ir.mlir [mlir] [VectorOps] Implement vector.create_mask lowering to LLVM IR 2020-05-15 11:02:30 -07:00