forked from OSchip/llvm-project
38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEFAULTCPU
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; RUN: llc < %s -mcpu=x86-64 -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64CPU
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define void @merge_8_float_zero_stores(float* %ptr) {
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; DEFAULTCPU-LABEL: merge_8_float_zero_stores:
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; DEFAULTCPU: # BB#0:
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; DEFAULTCPU-NEXT: movq $0, (%rdi)
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; DEFAULTCPU-NEXT: movq $0, 8(%rdi)
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; DEFAULTCPU-NEXT: movq $0, 16(%rdi)
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; DEFAULTCPU-NEXT: movq $0, 24(%rdi)
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; DEFAULTCPU-NEXT: retq
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;
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; X64CPU-LABEL: merge_8_float_zero_stores:
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; X64CPU: # BB#0:
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; X64CPU-NEXT: xorps %xmm0, %xmm0
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; X64CPU-NEXT: movups %xmm0, (%rdi)
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; X64CPU-NEXT: movups %xmm0, 16(%rdi)
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; X64CPU-NEXT: retq
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%idx0 = getelementptr float, float* %ptr, i64 0
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%idx1 = getelementptr float, float* %ptr, i64 1
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%idx2 = getelementptr float, float* %ptr, i64 2
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%idx3 = getelementptr float, float* %ptr, i64 3
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%idx4 = getelementptr float, float* %ptr, i64 4
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%idx5 = getelementptr float, float* %ptr, i64 5
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%idx6 = getelementptr float, float* %ptr, i64 6
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%idx7 = getelementptr float, float* %ptr, i64 7
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store float 0.0, float* %idx0, align 4
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store float 0.0, float* %idx1, align 4
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store float 0.0, float* %idx2, align 4
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store float 0.0, float* %idx3, align 4
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store float 0.0, float* %idx4, align 4
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store float 0.0, float* %idx5, align 4
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store float 0.0, float* %idx6, align 4
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store float 0.0, float* %idx7, align 4
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ret void
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}
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