forked from OSchip/llvm-project
321 lines
14 KiB
LLVM
321 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+aes | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=slm | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge | FileCheck %s --check-prefix=CHECK --check-prefix=SANDY
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=SANDY
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
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define <2 x i64> @test_aesdec(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
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; GENERIC-LABEL: test_aesdec:
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; GENERIC: # BB#0:
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; GENERIC-NEXT: aesdec %xmm1, %xmm0 # sched: [7:1.00]
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; GENERIC-NEXT: aesdec (%rdi), %xmm0 # sched: [13:1.00]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; SLM-LABEL: test_aesdec:
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; SLM: # BB#0:
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; SLM-NEXT: aesdec %xmm1, %xmm0 # sched: [8:5.00]
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; SLM-NEXT: aesdec (%rdi), %xmm0 # sched: [8:5.00]
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; SLM-NEXT: retq # sched: [4:1.00]
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;
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; SANDY-LABEL: test_aesdec:
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; SANDY: # BB#0:
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; SANDY-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SANDY-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [13:1.00]
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; SANDY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_aesdec:
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; HASWELL: # BB#0:
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; HASWELL-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: retq # sched: [2:1.00]
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;
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; SKYLAKE-LABEL: test_aesdec:
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; SKYLAKE: # BB#0:
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; SKYLAKE-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: retq # sched: [2:1.00]
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;
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; BTVER2-LABEL: test_aesdec:
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; BTVER2: # BB#0:
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; BTVER2-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
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; BTVER2-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
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; BTVER2-NEXT: retq # sched: [4:1.00]
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;
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; ZNVER1-LABEL: test_aesdec:
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; ZNVER1: # BB#0:
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; ZNVER1-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
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; ZNVER1-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [11:0.50]
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; ZNVER1-NEXT: retq # sched: [5:0.50]
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%1 = load <2 x i64>, <2 x i64> *%a2, align 16
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%2 = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1)
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%3 = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %2, <2 x i64> %1)
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>)
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define <2 x i64> @test_aesdeclast(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
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; GENERIC-LABEL: test_aesdeclast:
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; GENERIC: # BB#0:
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; GENERIC-NEXT: aesdeclast %xmm1, %xmm0 # sched: [7:1.00]
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; GENERIC-NEXT: aesdeclast (%rdi), %xmm0 # sched: [13:1.00]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; SLM-LABEL: test_aesdeclast:
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; SLM: # BB#0:
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; SLM-NEXT: aesdeclast %xmm1, %xmm0 # sched: [8:5.00]
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; SLM-NEXT: aesdeclast (%rdi), %xmm0 # sched: [8:5.00]
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; SLM-NEXT: retq # sched: [4:1.00]
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;
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; SANDY-LABEL: test_aesdeclast:
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; SANDY: # BB#0:
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; SANDY-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SANDY-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [13:1.00]
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; SANDY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_aesdeclast:
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; HASWELL: # BB#0:
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; HASWELL-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: retq # sched: [2:1.00]
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;
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; SKYLAKE-LABEL: test_aesdeclast:
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; SKYLAKE: # BB#0:
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; SKYLAKE-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: retq # sched: [2:1.00]
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;
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; BTVER2-LABEL: test_aesdeclast:
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; BTVER2: # BB#0:
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; BTVER2-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
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; BTVER2-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
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; BTVER2-NEXT: retq # sched: [4:1.00]
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;
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; ZNVER1-LABEL: test_aesdeclast:
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; ZNVER1: # BB#0:
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; ZNVER1-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
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; ZNVER1-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [11:0.50]
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; ZNVER1-NEXT: retq # sched: [5:0.50]
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%1 = load <2 x i64>, <2 x i64> *%a2, align 16
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%2 = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1)
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%3 = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %2, <2 x i64> %1)
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>)
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define <2 x i64> @test_aesenc(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
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; GENERIC-LABEL: test_aesenc:
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; GENERIC: # BB#0:
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; GENERIC-NEXT: aesenc %xmm1, %xmm0 # sched: [7:1.00]
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; GENERIC-NEXT: aesenc (%rdi), %xmm0 # sched: [13:1.00]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; SLM-LABEL: test_aesenc:
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; SLM: # BB#0:
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; SLM-NEXT: aesenc %xmm1, %xmm0 # sched: [8:5.00]
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; SLM-NEXT: aesenc (%rdi), %xmm0 # sched: [8:5.00]
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; SLM-NEXT: retq # sched: [4:1.00]
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;
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; SANDY-LABEL: test_aesenc:
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; SANDY: # BB#0:
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; SANDY-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SANDY-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [13:1.00]
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; SANDY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_aesenc:
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; HASWELL: # BB#0:
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; HASWELL-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: retq # sched: [2:1.00]
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;
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; SKYLAKE-LABEL: test_aesenc:
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; SKYLAKE: # BB#0:
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; SKYLAKE-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: retq # sched: [2:1.00]
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;
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; BTVER2-LABEL: test_aesenc:
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; BTVER2: # BB#0:
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; BTVER2-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
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; BTVER2-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
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; BTVER2-NEXT: retq # sched: [4:1.00]
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;
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; ZNVER1-LABEL: test_aesenc:
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; ZNVER1: # BB#0:
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; ZNVER1-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
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; ZNVER1-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [11:0.50]
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; ZNVER1-NEXT: retq # sched: [5:0.50]
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%1 = load <2 x i64>, <2 x i64> *%a2, align 16
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%2 = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1)
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%3 = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %2, <2 x i64> %1)
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>)
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define <2 x i64> @test_aesenclast(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
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; GENERIC-LABEL: test_aesenclast:
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; GENERIC: # BB#0:
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; GENERIC-NEXT: aesenclast %xmm1, %xmm0 # sched: [7:1.00]
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; GENERIC-NEXT: aesenclast (%rdi), %xmm0 # sched: [13:1.00]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; SLM-LABEL: test_aesenclast:
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; SLM: # BB#0:
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; SLM-NEXT: aesenclast %xmm1, %xmm0 # sched: [8:5.00]
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; SLM-NEXT: aesenclast (%rdi), %xmm0 # sched: [8:5.00]
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; SLM-NEXT: retq # sched: [4:1.00]
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;
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; SANDY-LABEL: test_aesenclast:
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; SANDY: # BB#0:
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; SANDY-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SANDY-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [13:1.00]
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; SANDY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_aesenclast:
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; HASWELL: # BB#0:
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; HASWELL-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; HASWELL-NEXT: retq # sched: [2:1.00]
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;
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; SKYLAKE-LABEL: test_aesenclast:
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; SKYLAKE: # BB#0:
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; SKYLAKE-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
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; SKYLAKE-NEXT: retq # sched: [2:1.00]
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;
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; BTVER2-LABEL: test_aesenclast:
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; BTVER2: # BB#0:
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; BTVER2-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
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; BTVER2-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
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; BTVER2-NEXT: retq # sched: [4:1.00]
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;
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; ZNVER1-LABEL: test_aesenclast:
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; ZNVER1: # BB#0:
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; ZNVER1-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
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; ZNVER1-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [11:0.50]
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; ZNVER1-NEXT: retq # sched: [5:0.50]
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%1 = load <2 x i64>, <2 x i64> *%a2, align 16
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%2 = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1)
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%3 = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %2, <2 x i64> %1)
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>)
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define <2 x i64> @test_aesimc(<2 x i64> %a0, <2 x i64> *%a1) {
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; GENERIC-LABEL: test_aesimc:
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; GENERIC: # BB#0:
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; GENERIC-NEXT: aesimc %xmm0, %xmm1 # sched: [12:2.00]
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; GENERIC-NEXT: aesimc (%rdi), %xmm0 # sched: [18:2.00]
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; GENERIC-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; SLM-LABEL: test_aesimc:
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; SLM: # BB#0:
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; SLM-NEXT: aesimc %xmm0, %xmm1 # sched: [8:5.00]
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; SLM-NEXT: aesimc (%rdi), %xmm0 # sched: [8:5.00]
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; SLM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
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; SLM-NEXT: retq # sched: [4:1.00]
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;
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; SANDY-LABEL: test_aesimc:
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; SANDY: # BB#0:
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; SANDY-NEXT: vaesimc %xmm0, %xmm0 # sched: [12:2.00]
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; SANDY-NEXT: vaesimc (%rdi), %xmm1 # sched: [18:2.00]
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; SANDY-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
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; SANDY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_aesimc:
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; HASWELL: # BB#0:
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; HASWELL-NEXT: vaesimc %xmm0, %xmm0 # sched: [14:2.00]
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; HASWELL-NEXT: vaesimc (%rdi), %xmm1 # sched: [14:2.00]
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; HASWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
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; HASWELL-NEXT: retq # sched: [2:1.00]
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;
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; SKYLAKE-LABEL: test_aesimc:
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; SKYLAKE: # BB#0:
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; SKYLAKE-NEXT: vaesimc %xmm0, %xmm0 # sched: [14:2.00]
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; SKYLAKE-NEXT: vaesimc (%rdi), %xmm1 # sched: [14:2.00]
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; SKYLAKE-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
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; SKYLAKE-NEXT: retq # sched: [2:1.00]
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;
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; BTVER2-LABEL: test_aesimc:
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; BTVER2: # BB#0:
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; BTVER2-NEXT: vaesimc (%rdi), %xmm1 # sched: [7:1.00]
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; BTVER2-NEXT: vaesimc %xmm0, %xmm0 # sched: [2:1.00]
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; BTVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
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; BTVER2-NEXT: retq # sched: [4:1.00]
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;
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; ZNVER1-LABEL: test_aesimc:
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; ZNVER1: # BB#0:
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; ZNVER1-NEXT: vaesimc (%rdi), %xmm1 # sched: [11:0.50]
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; ZNVER1-NEXT: vaesimc %xmm0, %xmm0 # sched: [4:0.50]
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; ZNVER1-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
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; ZNVER1-NEXT: retq # sched: [5:0.50]
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%1 = load <2 x i64>, <2 x i64> *%a1, align 16
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%2 = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0)
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%3 = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %1)
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%4 = or <2 x i64> %2, %3
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ret <2 x i64> %4
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}
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declare <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64>)
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define <2 x i64> @test_aeskeygenassist(<2 x i64> %a0, <2 x i64> *%a1) {
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; GENERIC-LABEL: test_aeskeygenassist:
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; GENERIC: # BB#0:
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; GENERIC-NEXT: aeskeygenassist $7, %xmm0, %xmm1 # sched: [8:3.67]
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; GENERIC-NEXT: aeskeygenassist $7, (%rdi), %xmm0 # sched: [8:3.33]
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; GENERIC-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; SLM-LABEL: test_aeskeygenassist:
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; SLM: # BB#0:
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; SLM-NEXT: aeskeygenassist $7, %xmm0, %xmm1 # sched: [8:5.00]
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; SLM-NEXT: aeskeygenassist $7, (%rdi), %xmm0 # sched: [8:5.00]
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; SLM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
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; SLM-NEXT: retq # sched: [4:1.00]
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;
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; SANDY-LABEL: test_aeskeygenassist:
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; SANDY: # BB#0:
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; SANDY-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [8:3.67]
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; SANDY-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [8:3.33]
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; SANDY-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
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; SANDY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_aeskeygenassist:
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; HASWELL: # BB#0:
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; HASWELL-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [29:7.00]
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; HASWELL-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [28:7.00]
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; HASWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
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|
; HASWELL-NEXT: retq # sched: [2:1.00]
|
|
;
|
|
; SKYLAKE-LABEL: test_aeskeygenassist:
|
|
; SKYLAKE: # BB#0:
|
|
; SKYLAKE-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [29:7.00]
|
|
; SKYLAKE-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [28:7.00]
|
|
; SKYLAKE-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
|
|
; SKYLAKE-NEXT: retq # sched: [2:1.00]
|
|
;
|
|
; BTVER2-LABEL: test_aeskeygenassist:
|
|
; BTVER2: # BB#0:
|
|
; BTVER2-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [7:1.00]
|
|
; BTVER2-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [2:1.00]
|
|
; BTVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
|
|
; BTVER2-NEXT: retq # sched: [4:1.00]
|
|
;
|
|
; ZNVER1-LABEL: test_aeskeygenassist:
|
|
; ZNVER1: # BB#0:
|
|
; ZNVER1-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [11:0.50]
|
|
; ZNVER1-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [4:0.50]
|
|
; ZNVER1-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
|
|
; ZNVER1-NEXT: retq # sched: [5:0.50]
|
|
%1 = load <2 x i64>, <2 x i64> *%a1, align 16
|
|
%2 = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7)
|
|
%3 = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %1, i8 7)
|
|
%4 = or <2 x i64> %2, %3
|
|
ret <2 x i64> %4
|
|
}
|
|
declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8)
|