Craig Topper 22b35c4291 [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. ... We can rely on X86FixupBWInsts to turn these into MOVZX32. This simplifies a follow up commit to use MOVSX for i8 sdivrem with a late optimization to use CBW when register allocation works out. llvm-svn: 371242		2019-09-06 19:15:04 +00:00
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AArch64	[AArch64][GlobalISel] Always fall back on tail calls with -tailcallopt	2019-09-06 16:49:13 +00:00
AMDGPU	[AMDGPU] Enable constant offset promotion to immediate operand for VMEM stores	2019-09-06 15:33:53 +00:00
ARC	…
ARM	[ARM] Fix for buildbot	2019-09-06 09:36:23 +00:00
AVR	…
BPF	[BPF] Fix bpf llvm-objdump issues.	2019-08-17 22:12:00 +00:00
Generic	[GlobalISel] Handle multiple registers in dbg.value intrinsic	2019-08-20 16:28:37 +00:00
Hexagon	[DFAPacketizer] Track resources for packetized instructions	2019-09-06 12:20:08 +00:00
Inputs	…
Lanai	…
MIR	[MIR] Change test case to read from stdin instead of file	2019-09-06 06:55:54 +00:00
MSP430	…
Mips	[MIPS GlobalISel] Select G_FENCE	2019-09-05 11:20:32 +00:00
NVPTX	[NVPTX] Fix PR41651	2019-07-30 19:52:01 +00:00
PowerPC	[PowerPC][XCOFF] Verify symbol table in xcoff object files. [NFC]	2019-09-06 18:56:14 +00:00
RISCV	[RISCV] Enable tail call opt for variadic function	2019-09-04 02:03:36 +00:00
SPARC	[test] Fix tests when run on windows after SVN r369426. NFC.	2019-08-20 20:58:02 +00:00
SystemZ	[SystemZ] Recognize INLINEASM_BR in backend	2019-09-05 10:20:05 +00:00
Thumb	Revert [MBP] Disable aggressive loop rotate in plain mode	2019-08-29 19:03:58 +00:00
Thumb2	[ARM] Add patterns for VSUB with q and r registers	2019-09-06 17:02:42 +00:00
WebAssembly	[WebAssembly] Compare functions by names in Emscripten Sjlj	2019-09-03 22:26:49 +00:00
WinCFGuard	…
WinEH	Revert [Windows] Disable TrapUnreachable for Win64, add SEH_NoReturn	2019-09-03 22:27:27 +00:00
X86	[X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem.	2019-09-06 19:15:04 +00:00
XCore	…