forked from OSchip/llvm-project
62 lines
2.0 KiB
C++
62 lines
2.0 KiB
C++
//===-- LanaiMCTargetDesc.h - Lanai Target Descriptions ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Lanai specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIMCTARGETDESC_H
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#define LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIMCTARGETDESC_H
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCTargetOptions.h"
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCInstrAnalysis;
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class MCObjectWriter;
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class MCRelocationInfo;
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class MCSubtargetInfo;
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class Target;
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class Triple;
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class StringRef;
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class raw_pwrite_stream;
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extern Target TheLanaiTarget;
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MCCodeEmitter *createLanaiMCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx);
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MCAsmBackend *createLanaiAsmBackend(const Target &T, const MCRegisterInfo &MRI,
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const Triple &TheTriple, StringRef CPU,
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const MCTargetOptions &Options);
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MCObjectWriter *createLanaiELFObjectWriter(raw_pwrite_stream &OS,
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uint8_t OSABI);
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} // namespace llvm
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// Defines symbolic names for Lanai registers. This defines a mapping from
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// register name to register number.
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#define GET_REGINFO_ENUM
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#include "LanaiGenRegisterInfo.inc"
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// Defines symbolic names for the Lanai instructions.
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#define GET_INSTRINFO_ENUM
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#include "LanaiGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "LanaiGenSubtargetInfo.inc"
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#endif // LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIMCTARGETDESC_H
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