| .. |
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AsmParser
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[AMDGPU][mc] Add support for absolute expressions in DPP modifiers.
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2016-09-22 11:47:21 +00:00 |
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Disassembler
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Revert "[AMDGPU] Disassembler: print label names in branch instructions"
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2016-09-26 11:29:03 +00:00 |
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InstPrinter
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[AMDGPU] Enable changing instprinter's behavior based on the per-function
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2016-09-27 14:42:48 +00:00 |
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MCTargetDesc
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[AMDGPU] Assembler: remove unused AMDGPUMCObjectWriter.
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2016-09-21 10:33:32 +00:00 |
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TargetInfo
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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Utils
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AMDGPU] Assembler: better support for immediate literals in assembler.
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2016-09-09 14:44:04 +00:00 |
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AMDGPU.h
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AMDGPU: Split SILowerControlFlow into two pieces
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2016-08-22 19:33:16 +00:00 |
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AMDGPU.td
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[AMDGPU] Enable changing instprinter's behavior based on the per-function
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2016-09-27 14:42:48 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU/SI: Handle aliases in AMDGPUAlwaysInlinePass
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2016-08-31 11:18:33 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
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2016-09-16 21:34:26 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU/SI: Don't crash on anonymous GlobalValues
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2016-09-26 17:29:25 +00:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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AMDGPUCallLowering.cpp
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCallLowering.h
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Fix kernel argument alignment impacting stack size
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2016-06-18 05:15:53 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Use rcp for fdiv 1, x with fpmath metadata
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2016-07-26 23:25:44 +00:00 |
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AMDGPUFrameLowering.cpp
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MachineFunction: Return reference for getFrameInfo(); NFC
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2016-07-28 18:40:00 +00:00 |
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AMDGPUFrameLowering.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Fix broken FrameIndex handling
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2016-09-17 16:09:55 +00:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Push bitcasts through build_vector
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2016-09-17 15:44:16 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU: Refactor kernel argument lowering
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2016-09-16 21:53:00 +00:00 |
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AMDGPUInstrInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPU/R600: Remove macros
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2016-08-13 01:43:46 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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AMDGPUInstructions.td
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AMDGPU] Assembler: better support for immediate literals in assembler.
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2016-09-09 14:44:04 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
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AMDGPUIntrinsicInfo.h
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
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AMDGPUIntrinsics.td
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AMDGPU: Remove read_workdim intrinsic
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2016-07-25 20:17:02 +00:00 |
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AMDGPUMCInstLower.cpp
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AMDGPU/SI: Don't crash on anonymous GlobalValues
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2016-09-26 17:29:25 +00:00 |
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AMDGPUMCInstLower.h
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AMDGPU/SI: Don't crash on anonymous GlobalValues
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2016-09-26 17:29:25 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
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AMDGPUPromoteAlloca.cpp
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPURegisterInfo.td
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…
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AMDGPURuntimeMetadata.h
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AMDGPU: Add hidden kernel arguments to runtime metadata
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2016-09-07 17:44:00 +00:00 |
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AMDGPUSubtarget.cpp
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AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size
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2016-09-23 01:33:26 +00:00 |
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AMDGPUSubtarget.h
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AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size
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2016-09-23 01:33:26 +00:00 |
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AMDGPUTargetMachine.cpp
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AMDGPU: Run LoadStoreVectorizer pass by default
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2016-09-09 22:29:28 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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AMDGPUTargetObjectFile.cpp
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Move the Mangler from the AsmPrinter down to TLOF and clean up the
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2016-09-16 07:33:15 +00:00 |
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AMDGPUTargetObjectFile.h
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Move the Mangler from the AsmPrinter down to TLOF and clean up the
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2016-09-16 07:33:15 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Implement getLoadStoreVecRegBitWidth
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2016-07-01 00:56:27 +00:00 |
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AMDGPUTargetTransformInfo.h
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[TTI] The cost model should not assume vector casts get completely scalarized
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2016-07-06 17:30:56 +00:00 |
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AMDILCFGStructurizer.cpp
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CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
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2016-08-24 01:52:46 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
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2016-02-24 10:54:25 +00:00 |
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BUFInstructions.td
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[AMDGPU] Fix for bz30427: wrong MTBUF encoding on VI
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2016-09-23 21:21:21 +00:00 |
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CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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CMakeLists.txt
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
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CaymanInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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DSInstructions.td
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[AMDGPU][mc] Add support for ds_add_[rtn_]f32.
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2016-09-21 16:35:44 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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FLATInstructions.td
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[AMDGPU] Refactor FLAT TD instructions
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2016-09-05 11:22:51 +00:00 |
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GCNHazardRecognizer.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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GCNSchedStrategy.h
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
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LLVMBuild.txt
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AMDGPU: Prune AMDGPUAsmParser in libdeps.
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2016-07-09 07:54:27 +00:00 |
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MIMGInstructions.td
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AMDGPU/SI: MIMG TD Refactoring.
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2016-09-01 17:54:54 +00:00 |
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Processors.td
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AMDGPU : Add XNACK feature to GPUs that support it.
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2016-09-06 19:55:17 +00:00 |
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R600ClauseMergePass.cpp
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AMDGPU: Remove implicit iterator conversions, NFC
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2016-07-08 19:16:05 +00:00 |
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R600ControlFlowFinalizer.cpp
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AMDGPU: Avoid looking for the DebugLoc in end()
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2016-08-17 00:06:43 +00:00 |
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R600Defines.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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R600EmitClauseMarkers.cpp
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Fix more dereferenced end() iterators after r278532
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2016-08-13 01:12:49 +00:00 |
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R600ExpandSpecialInstrs.cpp
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600FrameLowering.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600FrameLowering.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600ISelLowering.cpp
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AMDGPU: Refactor kernel argument lowering
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2016-09-16 21:53:00 +00:00 |
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R600ISelLowering.h
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AMDGPU: Fix i1 fp_to_int
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2016-07-22 17:01:21 +00:00 |
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R600InstrFormats.td
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AMDGPU/R600: Convert buffer id to VTX_READ input
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2016-08-15 21:38:30 +00:00 |
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R600InstrInfo.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600InstrInfo.h
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600Instructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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R600Intrinsics.td
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AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
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2016-07-15 21:27:08 +00:00 |
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R600MachineFunctionInfo.cpp
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineFunctionInfo.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineScheduler.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600MachineScheduler.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600OptimizeVectorRegisters.cpp
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Use the range variant of find instead of unpacking begin/end
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2016-08-11 22:21:41 +00:00 |
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R600Packetizer.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600RegisterInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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R600RegisterInfo.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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R600RegisterInfo.td
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…
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R600Schedule.td
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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R700Instructions.td
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…
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SIAnnotateControlFlow.cpp
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AMDGPU: Allow some control flow intrinsics to be CSEd
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2016-09-16 22:11:18 +00:00 |
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SIDebuggerInsertNops.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIDefines.h
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AMDGPU: Use SOPK compare instructions
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2016-09-16 21:41:16 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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Revert "AMDGPU: Remove unused control flow intrinsic"
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2016-07-09 17:18:39 +00:00 |
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SIFixSGPRCopies.cpp
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Revert "AMDGPU: Remove unused control flow intrinsic"
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2016-07-09 17:18:39 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Support folding FrameIndex operands
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2016-09-14 15:51:33 +00:00 |
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SIFrameLowering.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
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2016-09-16 21:34:26 +00:00 |
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SIFrameLowering.h
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AMDGPU: Refactor frame lowering
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2016-08-31 21:52:21 +00:00 |
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SIISelLowering.cpp
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AMDGPU: Fix broken FrameIndex handling
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2016-09-17 16:09:55 +00:00 |
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SIISelLowering.h
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AMDGPU: Fix broken FrameIndex handling
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2016-09-17 16:09:55 +00:00 |
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SIInsertSkips.cpp
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AMDGPU: Split SILowerControlFlow into two pieces
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2016-08-22 19:33:16 +00:00 |
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SIInsertWaits.cpp
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AMDGPU: Remove implicit iterator conversions, NFC
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2016-07-08 19:16:05 +00:00 |
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SIInstrFormats.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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SIInstrInfo.cpp
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AMDGPU: Use i64 scalar compare instructions
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2016-09-17 02:02:19 +00:00 |
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SIInstrInfo.h
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AMDGPU: Use SOPK compare instructions
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2016-09-16 21:41:16 +00:00 |
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SIInstrInfo.td
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Revert "[AMDGPU] Disassembler: print label names in branch instructions"
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2016-09-26 11:29:03 +00:00 |
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SIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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SIIntrinsics.td
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AMDGPU: Allow some control flow intrinsics to be CSEd
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2016-09-16 22:11:18 +00:00 |
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SILoadStoreOptimizer.cpp
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SILoadStoreOptimizer.cpp: Fix a warning in r279991. [-Wunused-variable]
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2016-08-30 11:50:21 +00:00 |
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SILowerControlFlow.cpp
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AMDGPU: Remove register operand from si_mask_branch
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2016-08-27 00:42:21 +00:00 |
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SILowerI1Copies.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
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2016-09-16 21:34:26 +00:00 |
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SIMachineFunctionInfo.h
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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SIMachineScheduler.cpp
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AMDGPU/SI: Use a better method for determining the largest pressure sets
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2016-08-26 21:16:37 +00:00 |
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SIMachineScheduler.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU: Rename spill operands to match real instruction
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2016-09-17 15:52:37 +00:00 |
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SIRegisterInfo.h
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Remove unnecessary call to getAllocatableRegClass
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2016-09-07 06:16:45 +00:00 |
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SIRegisterInfo.td
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AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type.
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2016-09-09 19:31:51 +00:00 |
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SISchedule.td
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
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SIShrinkInstructions.cpp
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AMDGPU: Use SOPK compare instructions
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2016-09-16 21:41:16 +00:00 |
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SITypeRewriter.cpp
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
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SIWholeQuadMode.cpp
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AMDGPU: Do not clobber SCC in SIWholeQuadMode
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2016-09-12 16:25:20 +00:00 |
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SMInstructions.td
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[AMDGPU] Scalar Memory instructions TD refactoring
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2016-09-01 09:56:47 +00:00 |
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SOPInstructions.td
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AMDGPU: Use i64 scalar compare instructions
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2016-09-17 02:02:19 +00:00 |
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VIInstrFormats.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VOP1Instructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VOP2Instructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VOP3Instructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VOPCInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
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VOPInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
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