forked from OSchip/llvm-project
78 lines
2.2 KiB
LLVM
78 lines
2.2 KiB
LLVM
; RUN: opt %loadPolly -polly-delicm -analyze < %s | FileCheck %s
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;
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; The domain of bb14 contradicts the SCoP's assumptions. This leads to
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; 'anything goes' inside the statement since it is never executed,
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; including changing a memory write inside to
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; [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp[o0] : false }
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; (i.e.: never write)
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;
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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define void @f(i16* %arg, i32 %arg1) {
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bb:
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%tmp = alloca [24 x i32], align 4
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br label %bb2
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bb2:
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%tmp3 = phi i32 [ 0, %bb ], [ %tmp32, %bb34 ]
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br i1 true, label %bb5, label %bb4
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bb4:
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br label %bb24
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bb5:
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%tmp6 = sub nsw i32 %arg1, %tmp3
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%tmp7 = add i32 %tmp6, -1
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%tmp8 = icmp eq i32 %tmp3, 0
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%tmp9 = getelementptr inbounds i16, i16* %arg, i32 0
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br i1 %tmp8, label %bb13, label %bb10
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bb10:
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%tmp11 = getelementptr inbounds i16, i16* %tmp9, i32 %tmp7
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%tmp12 = load i16, i16* %tmp11, align 2
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br label %bb14
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bb13:
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br label %bb31
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bb14:
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%tmp15 = phi i32 [ 0, %bb10 ], [ %tmp21, %bb14 ]
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%tmp16 = phi i16 [ undef, %bb10 ], [ %tmp19, %bb14 ]
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%tmp17 = getelementptr inbounds [24 x i32], [24 x i32]* %tmp, i32 0, i32 %tmp15
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%tmp18 = getelementptr inbounds i16, i16* %tmp9, i32 0
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%tmp19 = load i16, i16* %tmp18, align 2
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store i32 undef, i32* %tmp17, align 4
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%tmp20 = call i32 asm "#", "=r,r"(i16 %tmp19) readnone
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%tmp21 = add nuw nsw i32 %tmp15, 1
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%tmp22 = icmp eq i32 %tmp21, %tmp3
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br i1 %tmp22, label %bb23, label %bb14
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bb23:
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br label %bb31
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bb24:
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%tmp25 = phi i32 [ %tmp30, %bb24 ], [ 0, %bb4 ]
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%tmp26 = mul nsw i32 %tmp25, %arg1
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%tmp27 = getelementptr inbounds i16, i16* %arg, i32 %tmp26
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%tmp28 = getelementptr inbounds i16, i16* %tmp27, i32 0
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%tmp29 = load i16, i16* %tmp28, align 2
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%tmp30 = add nuw nsw i32 %tmp25, 1
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br i1 false, label %bb31, label %bb24
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bb31:
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%tmp32 = add nuw nsw i32 %tmp3, 1
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br i1 undef, label %bb34, label %bb33
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bb33:
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unreachable
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bb34:
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br label %bb2
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}
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; CHECK: Stmt_bb14
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK-NEXT: [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp16__phi[] };
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; CHECK-NEXT: new: [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp[o0] : false };
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