forked from OSchip/llvm-project
96 lines
3.0 KiB
C++
96 lines
3.0 KiB
C++
//===- NewPMDriver.cpp - Driver for opt with new PM -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file is just a split of the code that logically belongs in opt.cpp but
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/// that includes the new pass manager headers.
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///
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//===----------------------------------------------------------------------===//
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#include "NewPMDriver.h"
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#include "Passes.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Analysis/CGSCCPassManager.h"
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#include "llvm/Analysis/LazyCallGraph.h"
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#include "llvm/Bitcode/BitcodeWriterPass.h"
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#include "llvm/IR/IRPrintingPasses.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/IR/Verifier.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ToolOutputFile.h"
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using namespace llvm;
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using namespace opt_tool;
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bool llvm::runPassPipeline(StringRef Arg0, LLVMContext &Context, Module &M,
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tool_output_file *Out, StringRef PassPipeline,
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OutputKind OK, VerifierKind VK) {
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FunctionAnalysisManager FAM;
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CGSCCAnalysisManager CGAM;
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ModuleAnalysisManager MAM;
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#define MODULE_ANALYSIS(NAME, CREATE_PASS) \
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MAM.registerPass(CREATE_PASS);
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#include "PassRegistry.def"
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#define CGSCC_ANALYSIS(NAME, CREATE_PASS) \
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CGAM.registerPass(CREATE_PASS);
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#include "PassRegistry.def"
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#define FUNCTION_ANALYSIS(NAME, CREATE_PASS) \
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FAM.registerPass(CREATE_PASS);
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#include "PassRegistry.def"
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// Cross register the analysis managers through their proxies.
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MAM.registerPass(FunctionAnalysisManagerModuleProxy(FAM));
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MAM.registerPass(CGSCCAnalysisManagerModuleProxy(CGAM));
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CGAM.registerPass(FunctionAnalysisManagerCGSCCProxy(FAM));
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CGAM.registerPass(ModuleAnalysisManagerCGSCCProxy(MAM));
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FAM.registerPass(CGSCCAnalysisManagerFunctionProxy(CGAM));
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FAM.registerPass(ModuleAnalysisManagerFunctionProxy(MAM));
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ModulePassManager MPM;
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if (VK > VK_NoVerifier)
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MPM.addPass(VerifierPass());
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if (!parsePassPipeline(MPM, PassPipeline, VK == VK_VerifyEachPass)) {
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errs() << Arg0 << ": unable to parse pass pipeline description.\n";
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return false;
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}
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if (VK > VK_NoVerifier)
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MPM.addPass(VerifierPass());
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// Add any relevant output pass at the end of the pipeline.
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switch (OK) {
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case OK_NoOutput:
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break; // No output pass needed.
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case OK_OutputAssembly:
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MPM.addPass(PrintModulePass(Out->os()));
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break;
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case OK_OutputBitcode:
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MPM.addPass(BitcodeWriterPass(Out->os()));
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break;
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}
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// Before executing passes, print the final values of the LLVM options.
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cl::PrintOptionValues();
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// Now that we have all of the passes ready, run them.
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MPM.run(&M, &MAM);
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// Declare success.
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if (OK != OK_NoOutput)
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Out->keep();
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return true;
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}
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