llvm-project/llvm/test/MC/Disassembler/PowerPC
Victor Huang 1492b70a03 [PowerPC][Future] Add prefixed loads and stores for future CPU
A previous patch should have added pld and pstd and any support code in
the backend that is required for prefixed load and store type operations.
This patch adds a number of additional prefixed load and store type
instructions for the future CPU.

Differential Revision: https://reviews.llvm.org/D72577
2020-01-29 14:45:56 -06:00
..
dcbt.txt
future-invalid.txt [PowerPC][Future] Add prefixed loads and stores for future CPU 2020-01-29 14:45:56 -06:00
futureinsts.txt [PowerPC][Future] Add prefixed loads and stores for future CPU 2020-01-29 14:45:56 -06:00
lit.local.cfg
ppc32-extpid-e500.txt
ppc64-encoding-4xx.txt
ppc64-encoding-6xx.txt
ppc64-encoding-bookII.txt
ppc64-encoding-bookIII.txt
ppc64-encoding-e500.txt
ppc64-encoding-ext.txt
ppc64-encoding-fp.txt
ppc64-encoding-p8htm.txt [PowerPC][HTM] Fix disassembling buffer overflow for tabortdc and others 2019-06-27 14:11:31 +00:00
ppc64-encoding-p8vector.txt
ppc64-encoding-p9vector.txt
ppc64-encoding-vmx.txt
ppc64-encoding.txt [PowerPC] Implementing overflow version for XO-Form instructions 2019-11-11 09:50:46 -06:00
ppc64-operands.txt
ppc64le-encoding.txt [PowerPC] Implementing overflow version for XO-Form instructions 2019-11-11 09:50:46 -06:00
qpx.txt
vsx.txt [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00