forked from OSchip/llvm-project
40 lines
1.3 KiB
YAML
40 lines
1.3 KiB
YAML
# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
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---
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name: cvt_pkrtz
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legalized: true
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regBankSelected: true
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# GCN-LABEL: name: cvt_pkrtz
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4
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; GCN: [[SGPR0:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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%0:sgpr(s32) = COPY $sgpr0
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; GCN: [[VGPR0:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr0
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; GCN: [[VGPR1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr1
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%3:vgpr(p1) = COPY $vgpr3_vgpr4
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; cvt_pkrtz vs
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; GCN: V_CVT_PKRTZ_F16_F32_e64 0, [[VGPR0]], 0, [[SGPR0]]
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%4:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pkrtz), %1, %0
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; cvt_pkrtz sv
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; GCN: V_CVT_PKRTZ_F16_F32_e64 0, [[SGPR0]], 0, [[VGPR0]]
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%5:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pkrtz), %0, %1
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; cvt_pkrtz vv
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; GCN: V_CVT_PKRTZ_F16_F32_e64 0, [[VGPR0]], 0, [[VGPR1]]
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%6:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pkrtz), %1, %2
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%7:vgpr(s32) = G_BITCAST %4
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%8:vgpr(s32) = G_BITCAST %5
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%9:vgpr(s32) = G_BITCAST %6
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S_ENDPGM 0, implicit %7, implicit %8, implicit %9
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...
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