llvm-project/llvm/test/CodeGen
Amara Emerson 2a312fc989 [AArch64][GlobalISel] RBS: Treat s128s like vectors when unmerging.
The destinations should be FPRs (for now).

Differential Revision: https://reviews.llvm.org/D66184

llvm-svn: 368775
2019-08-13 23:51:20 +00:00
..
AArch64 [AArch64][GlobalISel] RBS: Treat s128s like vectors when unmerging. 2019-08-13 23:51:20 +00:00
AMDGPU [GlobalISel]: Fix lowering of G_SHUFFLE_VECTOR with scalar sources 2019-08-13 21:49:11 +00:00
ARC
ARM GlobalISel: Add more verifier checks for G_SHUFFLE_VECTOR 2019-08-13 15:52:21 +00:00
AVR [AVR] Fix tests after r363757 2019-07-04 06:12:47 +00:00
BPF [Transforms] Do not drop !preserve.access.index metadata 2019-08-03 23:41:26 +00:00
Generic Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline." 2019-06-26 12:13:13 +00:00
Hexagon Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode" 2019-08-12 14:23:13 +00:00
Inputs [CodeGen] Add stack protector tests where the guard gets re-assigned 2019-07-17 20:46:16 +00:00
Lanai [SDAG] commute setcc operands to match a subtract 2019-07-10 23:23:54 +00:00
MIR GlobalISel: Add more verifier checks for G_SHUFFLE_VECTOR 2019-08-13 15:52:21 +00:00
MSP430
Mips [globalisel] Add G_SEXT_INREG 2019-08-09 21:11:20 +00:00
NVPTX [NVPTX] Fix PR41651 2019-07-30 19:52:01 +00:00
PowerPC [AIX]Lowering global address for 32/64bit small/large code models 2019-08-13 20:29:01 +00:00
RISCV Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode" 2019-08-12 14:23:13 +00:00
SPARC
SystemZ [SystemZ] Regenerate <8 x i31> store test 2019-07-29 09:49:23 +00:00
Thumb Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode" 2019-08-12 14:23:13 +00:00
Thumb2 [ARM] MVE spill vector test. NFC 2019-08-11 09:12:57 +00:00
WebAssembly Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT" 2019-08-13 09:33:25 +00:00
WinCFGuard
WinEH IR: print value numbers for unnamed function arguments 2019-08-03 14:28:34 +00:00
X86 [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
XCore