forked from OSchip/llvm-project
53 lines
1.9 KiB
LLVM
53 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
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define <2 x i64> @t1(<2 x i64> %x1, i32 %bits) nounwind {
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; X86-LABEL: t1:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; X86-NEXT: psllq %xmm1, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: t1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movd %edi, %xmm1
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; X64-NEXT: psllq %xmm1, %xmm0
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; X64-NEXT: retq
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entry:
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%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp3
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}
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define <2 x i64> @t2(<2 x i64> %x1) nounwind {
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; CHECK-LABEL: t2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: psllq $10, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp3
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}
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define <2 x i64> @t3(<2 x i64> %x1, i32 %bits) nounwind {
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; X86-LABEL: t3:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; X86-NEXT: psraw %xmm1, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: t3:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movd %edi, %xmm1
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; X64-NEXT: psraw %xmm1, %xmm0
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; X64-NEXT: retq
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entry:
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%tmp2 = bitcast <2 x i64> %x1 to <8 x i16> ; <<8 x i16>> [#uses=1]
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%tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone ; <<8 x i16>> [#uses=1]
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%tmp5 = bitcast <8 x i16> %tmp4 to <2 x i64> ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp5
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}
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declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone
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declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
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