forked from OSchip/llvm-project
118 lines
3.0 KiB
LLVM
118 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
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; Fold
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; ~(X - 1)
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; To
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; - X
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;
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; This needs to be a backend-level fold because only by now pointers
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; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()
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; intrinsic which is not sufficiently widely-spread yet.
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;
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; https://bugs.llvm.org/show_bug.cgi?id=44448
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; The basic positive tests
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define i32 @t0_32(i32 %alignment) nounwind {
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; X86-LABEL: t0_32:
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; X86: # %bb.0:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t0_32:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: negl %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%invmask = xor i32 %mask, -1
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ret i32 %invmask
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}
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define i64 @t1_64(i64 %alignment) nounwind {
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; X86-LABEL: t1_64:
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; X86: # %bb.0:
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: t1_64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: negq %rax
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; X64-NEXT: retq
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%mask = add i64 %alignment, -1
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%invmask = xor i64 %mask, -1
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ret i64 %invmask
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}
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; Extra use test
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define i32 @t2_extrause(i32 %alignment, i32* %mask_storage) nounwind {
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; X86-LABEL: t2_extrause:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal -1(%eax), %edx
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: negl %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t2_extrause:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: leal -1(%rax), %ecx
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; X64-NEXT: movl %ecx, (%rsi)
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; X64-NEXT: negl %eax
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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store i32 %mask, i32* %mask_storage
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%invmask = xor i32 %mask, -1
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ret i32 %invmask
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}
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; Negative tests
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define i32 @n3_not_dec(i32 %alignment) nounwind {
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; X86-LABEL: n3_not_dec:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: incl %eax
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; X86-NEXT: notl %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n3_not_dec:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal 1(%rdi), %eax
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; X64-NEXT: notl %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, 1 ; not -1
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%invmask = xor i32 %mask, -1
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ret i32 %invmask
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}
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define i32 @n4_not_not(i32 %alignment) nounwind {
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; X86-LABEL: n4_not_not:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: decl %eax
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; X86-NEXT: xorl $1, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n4_not_not:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal -1(%rdi), %eax
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; X64-NEXT: xorl $1, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%invmask = xor i32 %mask, 1 ; not -1
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ret i32 %invmask
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}
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