forked from OSchip/llvm-project
122 lines
3.4 KiB
LLVM
122 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
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;
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; Verify that fast-isel doesn't select legacy SSE instructions on targets that
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; feature AVX.
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;
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; Test cases are obtained from the following code snippet:
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; ///
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; double single_to_double_rr(float x) {
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; return (double)x;
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; }
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; float double_to_single_rr(double x) {
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; return (float)x;
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; }
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; double single_to_double_rm(float *x) {
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; return (double)*x;
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; }
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; float double_to_single_rm(double *x) {
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; return (float)*x;
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; }
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; ///
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define double @single_to_double_rr(float %x) {
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; SSE-LABEL: single_to_double_rr:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: cvtss2sd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: single_to_double_rr:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%conv = fpext float %x to double
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ret double %conv
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}
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define float @double_to_single_rr(double %x) {
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; SSE-LABEL: double_to_single_rr:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: cvtsd2ss %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: double_to_single_rr:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%conv = fptrunc double %x to float
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ret float %conv
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}
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define double @single_to_double_rm(float* %x) {
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; SSE-LABEL: single_to_double_rm:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NEXT: cvtss2sd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: single_to_double_rm:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load float, float* %x, align 4
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%conv = fpext float %0 to double
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ret double %conv
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}
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define double @single_to_double_rm_optsize(float* %x) optsize {
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; SSE-LABEL: single_to_double_rm_optsize:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: cvtss2sd (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: single_to_double_rm_optsize:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtss2sd (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load float, float* %x, align 4
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%conv = fpext float %0 to double
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ret double %conv
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}
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define float @double_to_single_rm(double* %x) {
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; SSE-LABEL: double_to_single_rm:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE-NEXT: cvtsd2ss %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: double_to_single_rm:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load double, double* %x, align 8
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%conv = fptrunc double %0 to float
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ret float %conv
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}
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define float @double_to_single_rm_optsize(double* %x) optsize {
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; SSE-LABEL: double_to_single_rm_optsize:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: cvtsd2ss (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: double_to_single_rm_optsize:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsd2ss (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load double, double* %x, align 8
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%conv = fptrunc double %0 to float
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ret float %conv
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}
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