forked from OSchip/llvm-project
85 lines
4.3 KiB
LLVM
85 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gn -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gn -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=SKX
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define void @any_extend_load_v8i64(<8 x i8> * %ptr) {
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; KNL-LABEL: any_extend_load_v8i64:
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; KNL: # %bb.0:
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; KNL-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
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; KNL-NEXT: vpmovzxbq {{.*#+}} ymm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
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; KNL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; KNL-NEXT: vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
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; KNL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
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; KNL-NEXT: vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
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; KNL-NEXT: vpmovqb %zmm0, (%rdi)
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; KNL-NEXT: vzeroupper
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; KNL-NEXT: retq
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;
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; SKX-LABEL: any_extend_load_v8i64:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovzxbq {{.*#+}} zmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero,mem[4],zero,zero,zero,zero,zero,zero,zero,mem[5],zero,zero,zero,zero,zero,zero,zero,mem[6],zero,zero,zero,zero,zero,zero,zero,mem[7],zero,zero,zero,zero,zero,zero,zero
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; SKX-NEXT: vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
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; SKX-NEXT: vpmovqb %zmm0, (%rdi)
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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%wide.load = load <8 x i8>, <8 x i8>* %ptr, align 1
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%1 = zext <8 x i8> %wide.load to <8 x i64>
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%2 = add nuw nsw <8 x i64> %1, <i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 4>
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%3 = xor <8 x i64> %2, zeroinitializer
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%4 = trunc <8 x i64> %3 to <8 x i8>
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store <8 x i8> %4, <8 x i8>* %ptr, align 1
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ret void
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}
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define void @any_extend_load_v8i32(<8 x i8> * %ptr) {
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; KNL-LABEL: any_extend_load_v8i32:
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; KNL: # %bb.0:
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; KNL-NEXT: vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
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; KNL-NEXT: vpbroadcastd {{.*#+}} ymm1 = [4,4,4,4,4,4,4,4]
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; KNL-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; KNL-NEXT: vpmovdb %zmm0, %xmm0
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; KNL-NEXT: vmovq %xmm0, (%rdi)
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; KNL-NEXT: vzeroupper
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; KNL-NEXT: retq
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;
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; SKX-LABEL: any_extend_load_v8i32:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
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; SKX-NEXT: vpaddd {{.*}}(%rip){1to8}, %ymm0, %ymm0
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; SKX-NEXT: vpmovdb %ymm0, (%rdi)
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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%wide.load = load <8 x i8>, <8 x i8>* %ptr, align 1
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%1 = zext <8 x i8> %wide.load to <8 x i32>
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%2 = add nuw nsw <8 x i32> %1, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
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%3 = xor <8 x i32> %2, zeroinitializer
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%4 = trunc <8 x i32> %3 to <8 x i8>
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store <8 x i8> %4, <8 x i8>* %ptr, align 1
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ret void
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}
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define void @any_extend_load_v8i16(<8 x i8> * %ptr) {
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; KNL-LABEL: any_extend_load_v8i16:
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; KNL: # %bb.0:
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; KNL-NEXT: vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
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; KNL-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
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; KNL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; KNL-NEXT: vmovq %xmm0, (%rdi)
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; KNL-NEXT: retq
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;
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; SKX-LABEL: any_extend_load_v8i16:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
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; SKX-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
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; SKX-NEXT: vpmovwb %xmm0, (%rdi)
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; SKX-NEXT: retq
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%wide.load = load <8 x i8>, <8 x i8>* %ptr, align 1
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%1 = zext <8 x i8> %wide.load to <8 x i16>
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%2 = add nuw nsw <8 x i16> %1, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
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%3 = xor <8 x i16> %2, zeroinitializer
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%4 = trunc <8 x i16> %3 to <8 x i8>
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store <8 x i8> %4, <8 x i8>* %ptr, align 1
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ret void
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}
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