forked from OSchip/llvm-project
144 lines
4.1 KiB
YAML
144 lines
4.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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define i1 @ptrtoint_s1_p0(i64* %p) {
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entry:
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%0 = ptrtoint i64* %p to i1
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ret i1 %0
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}
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define i8 @ptrtoint_s8_p0(i64* %p) {
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entry:
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%0 = ptrtoint i64* %p to i8
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ret i8 %0
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}
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define i16 @ptrtoint_s16_p0(i64* %p) {
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entry:
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%0 = ptrtoint i64* %p to i16
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ret i16 %0
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}
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define i32 @ptrtoint_s32_p0(i64* %p) {
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entry:
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%0 = ptrtoint i64* %p to i32
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ret i32 %0
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}
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...
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---
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name: ptrtoint_s1_p0
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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frameInfo:
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maxAlignment: 4
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fixedStack:
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- { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: ptrtoint_s1_p0
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; CHECK: [[MOV32rm:%[0-9]+]]:gr32_abcd = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
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; CHECK: [[COPY:%[0-9]+]]:gr8 = COPY [[MOV32rm]].sub_8bit
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; CHECK: $al = COPY [[COPY]]
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; CHECK: RET 0, implicit $al
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%1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
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%0:gpr(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
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%2:gpr(s1) = G_PTRTOINT %0(p0)
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%3:gpr(s8) = G_ANYEXT %2(s1)
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$al = COPY %3(s8)
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RET 0, implicit $al
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...
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---
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name: ptrtoint_s8_p0
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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frameInfo:
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maxAlignment: 4
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fixedStack:
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- { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: ptrtoint_s8_p0
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; CHECK: [[MOV32rm:%[0-9]+]]:gr32_abcd = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
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; CHECK: [[COPY:%[0-9]+]]:gr8 = COPY [[MOV32rm]].sub_8bit
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; CHECK: $al = COPY [[COPY]]
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; CHECK: RET 0, implicit $al
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%1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
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%0:gpr(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
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%2:gpr(s8) = G_PTRTOINT %0(p0)
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$al = COPY %2(s8)
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RET 0, implicit $al
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...
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---
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name: ptrtoint_s16_p0
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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frameInfo:
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maxAlignment: 4
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fixedStack:
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- { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: ptrtoint_s16_p0
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; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
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; CHECK: [[COPY:%[0-9]+]]:gr16 = COPY [[MOV32rm]].sub_16bit
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; CHECK: $ax = COPY [[COPY]]
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; CHECK: RET 0, implicit $ax
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%1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
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%0:gpr(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
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%2:gpr(s16) = G_PTRTOINT %0(p0)
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$ax = COPY %2(s16)
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RET 0, implicit $ax
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...
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---
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name: ptrtoint_s32_p0
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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frameInfo:
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maxAlignment: 4
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fixedStack:
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- { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: ptrtoint_s32_p0
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; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
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; CHECK: $eax = COPY [[MOV32rm]]
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; CHECK: RET 0, implicit $eax
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%1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
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%0:gpr(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
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%2:gpr(s32) = G_PTRTOINT %0(p0)
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$eax = COPY %2(s32)
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RET 0, implicit $eax
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...
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