forked from OSchip/llvm-project
1982 lines
51 KiB
LLVM
1982 lines
51 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define i32 @test1(i32 %X) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31
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; CHECK-NEXT: ret i32 [[X_LOBIT]]
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;
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%a = icmp slt i32 %X, 0
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%b = zext i1 %a to i32
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ret i32 %b
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}
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define i32 @test2(i32 %X) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31
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; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], 1
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; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]]
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;
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%a = icmp ult i32 %X, -2147483648
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%b = zext i1 %a to i32
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ret i32 %b
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}
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define i32 @test3(i32 %X) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31
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; CHECK-NEXT: ret i32 [[X_LOBIT]]
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;
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%a = icmp slt i32 %X, 0
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%b = sext i1 %a to i32
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ret i32 %b
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}
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define i32 @test4(i32 %X) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31
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; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], -1
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; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]]
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;
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%a = icmp ult i32 %X, -2147483648
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%b = sext i1 %a to i32
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ret i32 %b
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}
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; PR4837
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define <2 x i1> @test5(<2 x i64> %x) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
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;
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%V = icmp eq <2 x i64> %x, undef
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ret <2 x i1> %V
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}
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define i32 @test6(i32 %a, i32 %b) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[E:%.*]] = ashr i32 %a, 31
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; CHECK-NEXT: [[F:%.*]] = and i32 [[E]], %b
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; CHECK-NEXT: ret i32 [[F]]
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;
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%c = icmp sle i32 %a, -1
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%d = zext i1 %c to i32
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%e = sub i32 0, %d
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%f = and i32 %e, %b
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ret i32 %f
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}
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define i1 @test7(i32 %x) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %x, 0
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; CHECK-NEXT: ret i1 [[B]]
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;
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%a = add i32 %x, -1
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%b = icmp ult i32 %a, %x
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ret i1 %b
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}
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define i1 @test8(i32 %x){
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: ret i1 false
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;
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%a = add i32 %x, -1
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%b = icmp eq i32 %a, %x
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ret i1 %b
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}
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define i1 @test9(i32 %x) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 %x, 1
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; CHECK-NEXT: ret i1 [[B]]
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;
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%a = add i32 %x, -2
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%b = icmp ugt i32 %x, %a
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ret i1 %b
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}
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define i1 @test10(i32 %x){
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %x, -2147483648
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; CHECK-NEXT: ret i1 [[B]]
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;
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%a = add i32 %x, -1
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%b = icmp slt i32 %a, %x
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ret i1 %b
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}
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define i1 @test11(i32 %x) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: ret i1 true
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;
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%a = add nsw i32 %x, 8
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%b = icmp slt i32 %x, %a
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ret i1 %b
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}
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; PR6195
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define i1 @test12(i1 %A) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 %A, true
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; CHECK-NEXT: ret i1 [[NOT_A]]
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;
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%S = select i1 %A, i64 -4294967295, i64 8589934591
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%B = icmp ne i64 bitcast (<2 x i32> <i32 1, i32 -1> to i64), %S
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ret i1 %B
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}
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; PR6481
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define i1 @test13(i8 %X) nounwind readnone {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: ret i1 false
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;
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%cmp = icmp slt i8 undef, %X
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ret i1 %cmp
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}
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define i1 @test14(i8 %X) nounwind readnone {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: ret i1 false
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;
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%cmp = icmp slt i8 undef, -128
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ret i1 %cmp
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}
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define i1 @test15() nounwind readnone {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: ret i1 undef
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;
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%cmp = icmp eq i8 undef, -128
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ret i1 %cmp
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}
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define i1 @test16() nounwind readnone {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: ret i1 undef
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;
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%cmp = icmp ne i8 undef, -128
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ret i1 %cmp
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}
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define i1 @test17(i32 %x) nounwind {
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%shl = shl i32 1, %x
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%and = and i32 %shl, 8
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%cmp = icmp eq i32 %and, 0
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ret i1 %cmp
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}
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define i1 @test17a(i32 %x) nounwind {
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; CHECK-LABEL: @test17a(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, 2
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%shl = shl i32 1, %x
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%and = and i32 %shl, 7
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%cmp = icmp eq i32 %and, 0
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ret i1 %cmp
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}
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define i1 @test18(i32 %x) nounwind {
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sh = lshr i32 8, %x
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%and = and i32 %sh, 1
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%cmp = icmp eq i32 %and, 0
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ret i1 %cmp
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}
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define i1 @test19(i32 %x) nounwind {
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; CHECK-LABEL: @test19(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%shl = shl i32 1, %x
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%and = and i32 %shl, 8
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%cmp = icmp eq i32 %and, 8
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ret i1 %cmp
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}
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define i1 @test20(i32 %x) nounwind {
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; CHECK-LABEL: @test20(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%shl = shl i32 1, %x
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%and = and i32 %shl, 8
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%cmp = icmp ne i32 %and, 0
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ret i1 %cmp
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}
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define i1 @test20a(i32 %x) nounwind {
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; CHECK-LABEL: @test20a(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, 3
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%shl = shl i32 1, %x
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%and = and i32 %shl, 7
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%cmp = icmp ne i32 %and, 0
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ret i1 %cmp
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}
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define i1 @test21(i8 %x, i8 %y) {
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; CHECK-LABEL: @test21(
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; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 %x, 3
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; CHECK-NEXT: ret i1 [[B]]
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;
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%A = or i8 %x, 1
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%B = icmp ugt i8 %A, 3
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ret i1 %B
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}
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define i1 @test22(i8 %x, i8 %y) {
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; CHECK-LABEL: @test22(
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; CHECK-NEXT: [[B:%.*]] = icmp ult i8 %x, 4
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; CHECK-NEXT: ret i1 [[B]]
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;
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%A = or i8 %x, 1
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%B = icmp ult i8 %A, 4
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ret i1 %B
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}
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; PR2740
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define i1 @test23(i32 %x) {
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; CHECK-LABEL: @test23(
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; CHECK-NEXT: [[I4:%.*]] = icmp sgt i32 %x, 1328634634
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; CHECK-NEXT: ret i1 [[I4]]
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;
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%i3 = sdiv i32 %x, -1328634635
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%i4 = icmp eq i32 %i3, -1
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ret i1 %i4
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}
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@X = global [1000 x i32] zeroinitializer
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; PR8882
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define i1 @test24(i64 %i) {
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; CHECK-LABEL: @test24(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 %i, 1000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%p1 = getelementptr inbounds i32, i32* getelementptr inbounds ([1000 x i32], [1000 x i32]* @X, i64 0, i64 0), i64 %i
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%cmp = icmp eq i32* %p1, getelementptr inbounds ([1000 x i32], [1000 x i32]* @X, i64 1, i64 0)
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ret i1 %cmp
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}
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@X_as1 = addrspace(1) global [1000 x i32] zeroinitializer
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define i1 @test24_as1(i64 %i) {
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; CHECK-LABEL: @test24_as1(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TMP1]], 1000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%p1 = getelementptr inbounds i32, i32 addrspace(1)* getelementptr inbounds ([1000 x i32], [1000 x i32] addrspace(1)* @X_as1, i64 0, i64 0), i64 %i
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%cmp = icmp eq i32 addrspace(1)* %p1, getelementptr inbounds ([1000 x i32], [1000 x i32] addrspace(1)* @X_as1, i64 1, i64 0)
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ret i1 %cmp
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}
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define i1 @test25(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test25(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %x, %y
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = add nsw i32 %x, %z
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%rhs = add nsw i32 %y, %z
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%c = icmp sgt i32 %lhs, %rhs
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ret i1 %c
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}
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; X + Z > Y + Z -> X > Y if there is no overflow.
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define i1 @test26(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test26(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %x, %y
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = add nuw i32 %x, %z
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%rhs = add nuw i32 %y, %z
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%c = icmp ugt i32 %lhs, %rhs
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ret i1 %c
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}
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; X - Z > Y - Z -> X > Y if there is no overflow.
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define i1 @test27(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test27(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %x, %y
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = sub nsw i32 %x, %z
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%rhs = sub nsw i32 %y, %z
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%c = icmp sgt i32 %lhs, %rhs
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ret i1 %c
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}
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; X - Z > Y - Z -> X > Y if there is no overflow.
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define i1 @test28(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test28(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %x, %y
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = sub nuw i32 %x, %z
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%rhs = sub nuw i32 %y, %z
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%c = icmp ugt i32 %lhs, %rhs
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ret i1 %c
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}
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; X + Y > X -> Y > 0 if there is no overflow.
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define i1 @test29(i32 %x, i32 %y) {
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; CHECK-LABEL: @test29(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %y, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = add nsw i32 %x, %y
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%c = icmp sgt i32 %lhs, %x
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ret i1 %c
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}
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; X + Y > X -> Y > 0 if there is no overflow.
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define i1 @test30(i32 %x, i32 %y) {
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; CHECK-LABEL: @test30(
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; CHECK-NEXT: [[C:%.*]] = icmp ne i32 %y, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = add nuw i32 %x, %y
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%c = icmp ugt i32 %lhs, %x
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ret i1 %c
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}
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; X > X + Y -> 0 > Y if there is no overflow.
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define i1 @test31(i32 %x, i32 %y) {
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; CHECK-LABEL: @test31(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %y, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%rhs = add nsw i32 %x, %y
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%c = icmp sgt i32 %x, %rhs
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ret i1 %c
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}
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; X > X + Y -> 0 > Y if there is no overflow.
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define i1 @test32(i32 %x, i32 %y) {
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; CHECK-LABEL: @test32(
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; CHECK-NEXT: ret i1 false
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;
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%rhs = add nuw i32 %x, %y
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%c = icmp ugt i32 %x, %rhs
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ret i1 %c
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}
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; X - Y > X -> 0 > Y if there is no overflow.
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define i1 @test33(i32 %x, i32 %y) {
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; CHECK-LABEL: @test33(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %y, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = sub nsw i32 %x, %y
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%c = icmp sgt i32 %lhs, %x
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ret i1 %c
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}
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; X - Y > X -> 0 > Y if there is no overflow.
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define i1 @test34(i32 %x, i32 %y) {
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; CHECK-LABEL: @test34(
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; CHECK-NEXT: ret i1 false
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;
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%lhs = sub nuw i32 %x, %y
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%c = icmp ugt i32 %lhs, %x
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ret i1 %c
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}
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; X > X - Y -> Y > 0 if there is no overflow.
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define i1 @test35(i32 %x, i32 %y) {
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; CHECK-LABEL: @test35(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %y, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%rhs = sub nsw i32 %x, %y
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%c = icmp sgt i32 %x, %rhs
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ret i1 %c
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}
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; X > X - Y -> Y > 0 if there is no overflow.
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define i1 @test36(i32 %x, i32 %y) {
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; CHECK-LABEL: @test36(
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; CHECK-NEXT: [[C:%.*]] = icmp ne i32 %y, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%rhs = sub nuw i32 %x, %y
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%c = icmp ugt i32 %x, %rhs
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ret i1 %c
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}
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; X - Y > X - Z -> Z > Y if there is no overflow.
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define i1 @test37(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test37(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %z, %y
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = sub nsw i32 %x, %y
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%rhs = sub nsw i32 %x, %z
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%c = icmp sgt i32 %lhs, %rhs
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ret i1 %c
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}
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; X - Y > X - Z -> Z > Y if there is no overflow.
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define i1 @test38(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test38(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %z, %y
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; CHECK-NEXT: ret i1 [[C]]
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;
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%lhs = sub nuw i32 %x, %y
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%rhs = sub nuw i32 %x, %z
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%c = icmp ugt i32 %lhs, %rhs
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ret i1 %c
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}
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; PR9343 #1
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define i1 @test39(i32 %X, i32 %Y) {
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; CHECK-LABEL: @test39(
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; CHECK-NEXT: [[B:%.*]] = icmp eq i32 %X, 0
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; CHECK-NEXT: ret i1 [[B]]
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;
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%A = ashr exact i32 %X, %Y
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%B = icmp eq i32 %A, 0
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ret i1 %B
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}
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define i1 @test40(i32 %X, i32 %Y) {
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; CHECK-LABEL: @test40(
|
|
; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %X, 0
|
|
; CHECK-NEXT: ret i1 [[B]]
|
|
;
|
|
%A = lshr exact i32 %X, %Y
|
|
%B = icmp ne i32 %A, 0
|
|
ret i1 %B
|
|
}
|
|
|
|
; PR9343 #3
|
|
define i1 @test41(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test41(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%A = urem i32 %X, %Y
|
|
%B = icmp ugt i32 %Y, %A
|
|
ret i1 %B
|
|
}
|
|
|
|
define i1 @test42(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test42(
|
|
; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 %Y, -1
|
|
; CHECK-NEXT: ret i1 [[B]]
|
|
;
|
|
%A = srem i32 %X, %Y
|
|
%B = icmp slt i32 %A, %Y
|
|
ret i1 %B
|
|
}
|
|
|
|
define i1 @test43(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test43(
|
|
; CHECK-NEXT: [[B:%.*]] = icmp slt i32 %Y, 0
|
|
; CHECK-NEXT: ret i1 [[B]]
|
|
;
|
|
%A = srem i32 %X, %Y
|
|
%B = icmp slt i32 %Y, %A
|
|
ret i1 %B
|
|
}
|
|
|
|
define i1 @test44(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test44(
|
|
; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 %Y, -1
|
|
; CHECK-NEXT: ret i1 [[B]]
|
|
;
|
|
%A = srem i32 %X, %Y
|
|
%B = icmp slt i32 %A, %Y
|
|
ret i1 %B
|
|
}
|
|
|
|
define i1 @test45(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test45(
|
|
; CHECK-NEXT: [[B:%.*]] = icmp slt i32 %Y, 0
|
|
; CHECK-NEXT: ret i1 [[B]]
|
|
;
|
|
%A = srem i32 %X, %Y
|
|
%B = icmp slt i32 %Y, %A
|
|
ret i1 %B
|
|
}
|
|
|
|
; PR9343 #4
|
|
define i1 @test46(i32 %X, i32 %Y, i32 %Z) {
|
|
; CHECK-LABEL: @test46(
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 %X, %Y
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%A = ashr exact i32 %X, %Z
|
|
%B = ashr exact i32 %Y, %Z
|
|
%C = icmp ult i32 %A, %B
|
|
ret i1 %C
|
|
}
|
|
|
|
; PR9343 #5
|
|
define i1 @test47(i32 %X, i32 %Y, i32 %Z) {
|
|
; CHECK-LABEL: @test47(
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %X, %Y
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%A = ashr exact i32 %X, %Z
|
|
%B = ashr exact i32 %Y, %Z
|
|
%C = icmp ugt i32 %A, %B
|
|
ret i1 %C
|
|
}
|
|
|
|
; PR9343 #8
|
|
define i1 @test48(i32 %X, i32 %Y, i32 %Z) {
|
|
; CHECK-LABEL: @test48(
|
|
; CHECK-NEXT: [[C:%.*]] = icmp eq i32 %X, %Y
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%A = sdiv exact i32 %X, %Z
|
|
%B = sdiv exact i32 %Y, %Z
|
|
%C = icmp eq i32 %A, %B
|
|
ret i1 %C
|
|
}
|
|
|
|
; PR8469
|
|
define <2 x i1> @test49(<2 x i32> %tmp3) {
|
|
; CHECK-LABEL: @test49(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
|
|
;
|
|
entry:
|
|
%tmp11 = and <2 x i32> %tmp3, <i32 3, i32 3>
|
|
%cmp = icmp ult <2 x i32> %tmp11, <i32 4, i32 4>
|
|
ret <2 x i1> %cmp
|
|
}
|
|
|
|
; PR9343 #7
|
|
define i1 @test50(i16 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test50(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%A = zext i16 %X to i32
|
|
%B = srem i32 %A, %Y
|
|
%C = icmp sgt i32 %B, -1
|
|
ret i1 %C
|
|
}
|
|
|
|
define i1 @test51(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @test51(
|
|
; CHECK-NEXT: [[A:%.*]] = and i32 %X, -2147483648
|
|
; CHECK-NEXT: [[B:%.*]] = srem i32 [[A]], %Y
|
|
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[B]], -1
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%A = and i32 %X, 2147483648
|
|
%B = srem i32 %A, %Y
|
|
%C = icmp sgt i32 %B, -1
|
|
ret i1 %C
|
|
}
|
|
|
|
define i1 @test52(i32 %x1) nounwind {
|
|
; CHECK-LABEL: @test52(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x1, 16711935
|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 4980863
|
|
; CHECK-NEXT: ret i1 [[TMP2]]
|
|
;
|
|
%conv = and i32 %x1, 255
|
|
%cmp = icmp eq i32 %conv, 127
|
|
%tmp2 = lshr i32 %x1, 16
|
|
%tmp3 = trunc i32 %tmp2 to i8
|
|
%cmp15 = icmp eq i8 %tmp3, 76
|
|
|
|
%A = and i1 %cmp, %cmp15
|
|
ret i1 %A
|
|
}
|
|
|
|
; PR9838
|
|
define i1 @test53(i32 %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: @test53(
|
|
; CHECK-NEXT: [[X:%.*]] = sdiv exact i32 %a, 30
|
|
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 %b, 30
|
|
; CHECK-NEXT: [[Z:%.*]] = icmp eq i32 [[X]], [[Y]]
|
|
; CHECK-NEXT: ret i1 [[Z]]
|
|
;
|
|
%x = sdiv exact i32 %a, 30
|
|
%y = sdiv i32 %b, 30
|
|
%z = icmp eq i32 %x, %y
|
|
ret i1 %z
|
|
}
|
|
|
|
define i1 @test54(i8 %a) nounwind {
|
|
; CHECK-LABEL: @test54(
|
|
; CHECK-NEXT: [[AND:%.*]] = and i8 %a, -64
|
|
; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[AND]], -128
|
|
; CHECK-NEXT: ret i1 [[RET]]
|
|
;
|
|
%ext = zext i8 %a to i32
|
|
%and = and i32 %ext, 192
|
|
%ret = icmp eq i32 %and, 128
|
|
ret i1 %ret
|
|
}
|
|
|
|
define i1 @test55(i32 %a) {
|
|
; CHECK-LABEL: @test55(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, -123
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%sub = sub i32 0, %a
|
|
%cmp = icmp eq i32 %sub, 123
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test56(i32 %a) {
|
|
; CHECK-LABEL: @test56(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, -113
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%sub = sub i32 10, %a
|
|
%cmp = icmp eq i32 %sub, 123
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; PR10267 Don't make icmps more expensive when no other inst is subsumed.
|
|
declare void @foo(i32)
|
|
define i1 @test57(i32 %a) {
|
|
; CHECK-LABEL: @test57(
|
|
; CHECK-NEXT: [[AND:%.*]] = and i32 %a, -2
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0
|
|
; CHECK-NEXT: call void @foo(i32 [[AND]])
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%and = and i32 %a, -2
|
|
%cmp = icmp ne i32 %and, 0
|
|
call void @foo(i32 %and)
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; rdar://problem/10482509
|
|
define zeroext i1 @cmpabs1(i64 %val) {
|
|
; CHECK-LABEL: @cmpabs1(
|
|
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 %val, 0
|
|
; CHECK-NEXT: ret i1 [[TOBOOL]]
|
|
;
|
|
%sub = sub nsw i64 0, %val
|
|
%cmp = icmp slt i64 %val, 0
|
|
%sub.val = select i1 %cmp, i64 %sub, i64 %val
|
|
%tobool = icmp ne i64 %sub.val, 0
|
|
ret i1 %tobool
|
|
}
|
|
|
|
define zeroext i1 @cmpabs2(i64 %val) {
|
|
; CHECK-LABEL: @cmpabs2(
|
|
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 %val, 0
|
|
; CHECK-NEXT: ret i1 [[TOBOOL]]
|
|
;
|
|
%sub = sub nsw i64 0, %val
|
|
%cmp = icmp slt i64 %val, 0
|
|
%sub.val = select i1 %cmp, i64 %val, i64 %sub
|
|
%tobool = icmp ne i64 %sub.val, 0
|
|
ret i1 %tobool
|
|
}
|
|
|
|
define void @test58() nounwind {
|
|
; CHECK-LABEL: @test58(
|
|
; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 36029346783166592) #1
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%cast = bitcast <1 x i64> <i64 36029346783166592> to i64
|
|
%call = call i32 @test58_d( i64 %cast) nounwind
|
|
ret void
|
|
}
|
|
declare i32 @test58_d(i64)
|
|
|
|
define i1 @test59(i8* %foo) {
|
|
; CHECK-LABEL: @test59(
|
|
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8* %foo, i64 8
|
|
; CHECK-NEXT: [[USE:%.*]] = ptrtoint i8* [[GEP1]] to i64
|
|
; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 [[USE]]) #1
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%bit = bitcast i8* %foo to i32*
|
|
%gep1 = getelementptr inbounds i32, i32* %bit, i64 2
|
|
%gep2 = getelementptr inbounds i8, i8* %foo, i64 10
|
|
%cast1 = bitcast i32* %gep1 to i8*
|
|
%cmp = icmp ult i8* %cast1, %gep2
|
|
%use = ptrtoint i8* %cast1 to i64
|
|
%call = call i32 @test58_d(i64 %use) nounwind
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test59_as1(i8 addrspace(1)* %foo) {
|
|
; CHECK-LABEL: @test59_as1(
|
|
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* %foo, i16 8
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i8 addrspace(1)* [[GEP1]] to i16
|
|
; CHECK-NEXT: [[USE:%.*]] = zext i16 [[TMP1]] to i64
|
|
; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 [[USE]]) #1
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%bit = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)*
|
|
%gep1 = getelementptr inbounds i32, i32 addrspace(1)* %bit, i64 2
|
|
%gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i64 10
|
|
%cast1 = bitcast i32 addrspace(1)* %gep1 to i8 addrspace(1)*
|
|
%cmp = icmp ult i8 addrspace(1)* %cast1, %gep2
|
|
%use = ptrtoint i8 addrspace(1)* %cast1 to i64
|
|
%call = call i32 @test58_d(i64 %use) nounwind
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test60(i8* %foo, i64 %i, i64 %j) {
|
|
; CHECK-LABEL: @test60(
|
|
; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 %i, 2
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], %j
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
|
;
|
|
%bit = bitcast i8* %foo to i32*
|
|
%gep1 = getelementptr inbounds i32, i32* %bit, i64 %i
|
|
%gep2 = getelementptr inbounds i8, i8* %foo, i64 %j
|
|
%cast1 = bitcast i32* %gep1 to i8*
|
|
%cmp = icmp ult i8* %cast1, %gep2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test60_as1(i8 addrspace(1)* %foo, i64 %i, i64 %j) {
|
|
; CHECK-LABEL: @test60_as1(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i16
|
|
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 %j to i16
|
|
; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 [[TMP1]], 2
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[TMP2]], [[GEP1_IDX]]
|
|
; CHECK-NEXT: ret i1 [[TMP3]]
|
|
;
|
|
%bit = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)*
|
|
%gep1 = getelementptr inbounds i32, i32 addrspace(1)* %bit, i64 %i
|
|
%gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i64 %j
|
|
%cast1 = bitcast i32 addrspace(1)* %gep1 to i8 addrspace(1)*
|
|
%cmp = icmp ult i8 addrspace(1)* %cast1, %gep2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; Same as test60, but look through an addrspacecast instead of a
|
|
; bitcast. This uses the same sized addrspace.
|
|
define i1 @test60_addrspacecast(i8* %foo, i64 %i, i64 %j) {
|
|
; CHECK-LABEL: @test60_addrspacecast(
|
|
; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 %i, 2
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], %j
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
|
;
|
|
%bit = addrspacecast i8* %foo to i32 addrspace(3)*
|
|
%gep1 = getelementptr inbounds i32, i32 addrspace(3)* %bit, i64 %i
|
|
%gep2 = getelementptr inbounds i8, i8* %foo, i64 %j
|
|
%cast1 = addrspacecast i32 addrspace(3)* %gep1 to i8*
|
|
%cmp = icmp ult i8* %cast1, %gep2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test60_addrspacecast_smaller(i8* %foo, i16 %i, i64 %j) {
|
|
; CHECK-LABEL: @test60_addrspacecast_smaller(
|
|
; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 %i, 2
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %j to i16
|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i16 [[TMP1]], [[GEP1_IDX]]
|
|
; CHECK-NEXT: ret i1 [[TMP2]]
|
|
;
|
|
%bit = addrspacecast i8* %foo to i32 addrspace(1)*
|
|
%gep1 = getelementptr inbounds i32, i32 addrspace(1)* %bit, i16 %i
|
|
%gep2 = getelementptr inbounds i8, i8* %foo, i64 %j
|
|
%cast1 = addrspacecast i32 addrspace(1)* %gep1 to i8*
|
|
%cmp = icmp ult i8* %cast1, %gep2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test60_addrspacecast_larger(i8 addrspace(1)* %foo, i32 %i, i16 %j) {
|
|
; CHECK-LABEL: @test60_addrspacecast_larger(
|
|
; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i32 %i, 2
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[GEP1_IDX]] to i16
|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], %j
|
|
; CHECK-NEXT: ret i1 [[TMP2]]
|
|
;
|
|
%bit = addrspacecast i8 addrspace(1)* %foo to i32 addrspace(2)*
|
|
%gep1 = getelementptr inbounds i32, i32 addrspace(2)* %bit, i32 %i
|
|
%gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i16 %j
|
|
%cast1 = addrspacecast i32 addrspace(2)* %gep1 to i8 addrspace(1)*
|
|
%cmp = icmp ult i8 addrspace(1)* %cast1, %gep2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test61(i8* %foo, i64 %i, i64 %j) {
|
|
; CHECK-LABEL: @test61(
|
|
; CHECK-NEXT: [[BIT:%.*]] = bitcast i8* %foo to i32*
|
|
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32* [[BIT]], i64 %i
|
|
; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8* %foo, i64 %j
|
|
; CHECK-NEXT: [[CAST1:%.*]] = bitcast i32* [[GEP1]] to i8*
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8* [[CAST1]], [[GEP2]]
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%bit = bitcast i8* %foo to i32*
|
|
%gep1 = getelementptr i32, i32* %bit, i64 %i
|
|
%gep2 = getelementptr i8, i8* %foo, i64 %j
|
|
%cast1 = bitcast i32* %gep1 to i8*
|
|
%cmp = icmp ult i8* %cast1, %gep2
|
|
ret i1 %cmp
|
|
; Don't transform non-inbounds GEPs.
|
|
}
|
|
|
|
define i1 @test61_as1(i8 addrspace(1)* %foo, i16 %i, i16 %j) {
|
|
; CHECK-LABEL: @test61_as1(
|
|
; CHECK-NEXT: [[BIT:%.*]] = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)*
|
|
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32 addrspace(1)* [[BIT]], i16 %i
|
|
; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8 addrspace(1)* %foo, i16 %j
|
|
; CHECK-NEXT: [[CAST1:%.*]] = bitcast i32 addrspace(1)* [[GEP1]] to i8 addrspace(1)*
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 addrspace(1)* [[CAST1]], [[GEP2]]
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%bit = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)*
|
|
%gep1 = getelementptr i32, i32 addrspace(1)* %bit, i16 %i
|
|
%gep2 = getelementptr i8, i8 addrspace(1)* %foo, i16 %j
|
|
%cast1 = bitcast i32 addrspace(1)* %gep1 to i8 addrspace(1)*
|
|
%cmp = icmp ult i8 addrspace(1)* %cast1, %gep2
|
|
ret i1 %cmp
|
|
; Don't transform non-inbounds GEPs.
|
|
}
|
|
|
|
define i1 @test62(i8* %a) {
|
|
; CHECK-LABEL: @test62(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%arrayidx1 = getelementptr inbounds i8, i8* %a, i64 1
|
|
%arrayidx2 = getelementptr inbounds i8, i8* %a, i64 10
|
|
%cmp = icmp slt i8* %arrayidx1, %arrayidx2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test62_as1(i8 addrspace(1)* %a) {
|
|
; CHECK-LABEL: @test62_as1(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%arrayidx1 = getelementptr inbounds i8, i8 addrspace(1)* %a, i64 1
|
|
%arrayidx2 = getelementptr inbounds i8, i8 addrspace(1)* %a, i64 10
|
|
%cmp = icmp slt i8 addrspace(1)* %arrayidx1, %arrayidx2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test63(i8 %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: @test63(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %b to i8
|
|
; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], %a
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%z = zext i8 %a to i32
|
|
%t = and i32 %b, 255
|
|
%c = icmp eq i32 %z, %t
|
|
ret i1 %c
|
|
}
|
|
|
|
define i1 @test64(i8 %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: @test64(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %b to i8
|
|
; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], %a
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%t = and i32 %b, 255
|
|
%z = zext i8 %a to i32
|
|
%c = icmp eq i32 %t, %z
|
|
ret i1 %c
|
|
}
|
|
|
|
define i1 @test65(i64 %A, i64 %B) {
|
|
; CHECK-LABEL: @test65(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%s1 = add i64 %A, %B
|
|
%s2 = add i64 %A, %B
|
|
%cmp = icmp eq i64 %s1, %s2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test66(i64 %A, i64 %B) {
|
|
; CHECK-LABEL: @test66(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%s1 = add i64 %A, %B
|
|
%s2 = add i64 %B, %A
|
|
%cmp = icmp eq i64 %s1, %s2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test67(i32 %x) nounwind uwtable {
|
|
; CHECK-LABEL: @test67(
|
|
; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 96
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%and = and i32 %x, 127
|
|
%cmp = icmp sgt i32 %and, 31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @test68(i32 %x) nounwind uwtable {
|
|
; CHECK-LABEL: @test68(
|
|
; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 127
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[AND]], 30
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%and = and i32 %x, 127
|
|
%cmp = icmp sgt i32 %and, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; PR14708
|
|
define i1 @test69(i32 %c) nounwind uwtable {
|
|
; CHECK-LABEL: @test69(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = or i32 %c, 32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 97
|
|
; CHECK-NEXT: ret i1 [[TMP2]]
|
|
;
|
|
%1 = icmp eq i32 %c, 97
|
|
%2 = icmp eq i32 %c, 65
|
|
%3 = or i1 %1, %2
|
|
ret i1 %3
|
|
}
|
|
|
|
; PR15940
|
|
define i1 @test70(i32 %X) {
|
|
; CHECK-LABEL: @test70(
|
|
; CHECK-NEXT: [[A:%.*]] = srem i32 5, %X
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A]], 2
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
;
|
|
%A = srem i32 5, %X
|
|
%B = add i32 %A, 2
|
|
%C = icmp ne i32 %B, 4
|
|
ret i1 %C
|
|
}
|
|
|
|
define i1 @icmp_sext16trunc(i32 %x) {
|
|
; CHECK-LABEL: @icmp_sext16trunc(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i16
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%trunc = trunc i32 %x to i16
|
|
%sext = sext i16 %trunc to i32
|
|
%cmp = icmp slt i32 %sext, 36
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sext8trunc(i32 %x) {
|
|
; CHECK-LABEL: @icmp_sext8trunc(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%trunc = trunc i32 %x to i8
|
|
%sext = sext i8 %trunc to i32
|
|
%cmp = icmp slt i32 %sext, 36
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl16(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl16(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i16
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 %x, 16
|
|
%cmp = icmp slt i32 %shl, 2359296
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl24(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl24(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 %x, 24
|
|
%cmp = icmp slt i32 %shl, 603979776
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; If the (shl x, C) preserved the sign and this is a sign test,
|
|
; compare the LHS operand instead
|
|
define i1 @icmp_shl_nsw_sgt(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_nsw_sgt(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl nsw i32 %x, 21
|
|
%cmp = icmp sgt i32 %shl, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_nsw_sge0(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_nsw_sge0(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, -1
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl nsw i32 %x, 21
|
|
%cmp = icmp sge i32 %shl, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_nsw_sge1(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_nsw_sge1(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl nsw i32 %x, 21
|
|
%cmp = icmp sge i32 %shl, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; Checks for icmp (eq|ne) (shl x, C), 0
|
|
define i1 @icmp_shl_nsw_eq(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_nsw_eq(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = shl nsw i32 %x, 5
|
|
%cmp = icmp eq i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_eq(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_eq(
|
|
; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 %x, 134217727
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[MUL_MASK]], 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = shl i32 %x, 5
|
|
%cmp = icmp eq i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_nsw_ne(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_nsw_ne(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = shl nsw i32 %x, 7
|
|
%cmp = icmp ne i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_ne(i32 %x) {
|
|
; CHECK-LABEL: @icmp_shl_ne(
|
|
; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 %x, 33554431
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[MUL_MASK]], 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = shl i32 %x, 7
|
|
%cmp = icmp ne i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; If the (mul x, C) preserved the sign and this is sign test,
|
|
; compare the LHS operand instead
|
|
define i1 @icmp_mul_nsw(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_nsw(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul nsw i32 %x, 12
|
|
%cmp = icmp sgt i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul_nsw1(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_nsw1(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul nsw i32 %x, 12
|
|
%cmp = icmp sle i32 %mul, -1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul_nsw_neg(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_nsw_neg(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 1
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul nsw i32 %x, -12
|
|
%cmp = icmp sge i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul_nsw_neg1(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_nsw_neg1(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul nsw i32 %x, -12
|
|
%cmp = icmp sge i32 %mul, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul_nsw_0(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_nsw_0(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%mul = mul nsw i32 %x, 0
|
|
%cmp = icmp sgt i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul(
|
|
; CHECK-NEXT: [[MUL:%.*]] = mul i32 %x, -12
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[MUL]], -1
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul i32 %x, -12
|
|
%cmp = icmp sge i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; Checks for icmp (eq|ne) (mul x, C), 0
|
|
define i1 @icmp_mul_neq0(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_neq0(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul nsw i32 %x, -12
|
|
%cmp = icmp ne i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul_eq0(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul_eq0(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%mul = mul nsw i32 %x, 12
|
|
%cmp = icmp eq i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul0_eq0(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul0_eq0(
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
%mul = mul i32 %x, 0
|
|
%cmp = icmp eq i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_mul0_ne0(i32 %x) {
|
|
; CHECK-LABEL: @icmp_mul0_ne0(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%mul = mul i32 %x, 0
|
|
%cmp = icmp ne i32 %mul, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub1_sge(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_sub1_sge(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, %y
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%sub = add nsw i32 %x, -1
|
|
%cmp = icmp sge i32 %sub, %y
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_add1_sgt(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_add1_sgt(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 %x, %y
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add nsw i32 %x, 1
|
|
%cmp = icmp sgt i32 %add, %y
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub1_slt(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_sub1_slt(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 %x, %y
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%sub = add nsw i32 %x, -1
|
|
%cmp = icmp slt i32 %sub, %y
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_add1_sle(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_add1_sle(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, %y
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add nsw i32 %x, 1
|
|
%cmp = icmp sle i32 %add, %y
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_add20_sge_add57(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 %y, 37
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], %x
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%1 = add nsw i32 %x, 20
|
|
%2 = add nsw i32 %y, 57
|
|
%cmp = icmp sge i32 %1, %2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_sub57_sge_sub20(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 %x, -37
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[TMP1]], %y
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%1 = add nsw i32 %x, -57
|
|
%2 = add nsw i32 %y, -20
|
|
%cmp = icmp sge i32 %1, %2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_and_shl_neg_ne_0(i32 %A, i32 %B) {
|
|
; CHECK-LABEL: @icmp_and_shl_neg_ne_0(
|
|
; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, %B
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], %A
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%neg = xor i32 %A, -1
|
|
%shl = shl i32 1, %B
|
|
%and = and i32 %shl, %neg
|
|
%cmp = icmp ne i32 %and, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) {
|
|
; CHECK-LABEL: @icmp_and_shl_neg_eq_0(
|
|
; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, %B
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], %A
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%neg = xor i32 %A, -1
|
|
%shl = shl i32 1, %B
|
|
%and = and i32 %shl, %neg
|
|
%cmp = icmp eq i32 %and, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_add_and_shr_ne_0(i32 %X) {
|
|
; CHECK-LABEL: @icmp_add_and_shr_ne_0(
|
|
; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 240
|
|
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 224
|
|
; CHECK-NEXT: ret i1 [[TOBOOL]]
|
|
;
|
|
%shr = lshr i32 %X, 4
|
|
%and = and i32 %shr, 15
|
|
%add = add i32 %and, -14
|
|
%tobool = icmp ne i32 %add, 0
|
|
ret i1 %tobool
|
|
}
|
|
|
|
; PR16244
|
|
define i1 @test71(i8* %x) {
|
|
; CHECK-LABEL: @test71(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%a = getelementptr i8, i8* %x, i64 8
|
|
%b = getelementptr inbounds i8, i8* %x, i64 8
|
|
%c = icmp ugt i8* %a, %b
|
|
ret i1 %c
|
|
}
|
|
|
|
define i1 @test71_as1(i8 addrspace(1)* %x) {
|
|
; CHECK-LABEL: @test71_as1(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%a = getelementptr i8, i8 addrspace(1)* %x, i64 8
|
|
%b = getelementptr inbounds i8, i8 addrspace(1)* %x, i64 8
|
|
%c = icmp ugt i8 addrspace(1)* %a, %b
|
|
ret i1 %c
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_ult_32(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_ult_32(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp ult i32 %shl, 32
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_eq_32(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_eq_32(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %V, 5
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp eq i32 %shl, 32
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_ult_30(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_ult_30(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp ult i32 %shl, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_ugt_30(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %V, 4
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp ugt i32 %shl, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_ule_30(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_ule_30(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp ule i32 %shl, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_uge_30(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_uge_30(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %V, 4
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp uge i32 %shl, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %V, 31
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp uge i32 %shl, 2147483648
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) {
|
|
; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %V, 31
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 1, %V
|
|
%cmp = icmp ult i32 %shl, 2147483648
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = add i64 %b, -1
|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], %a
|
|
; CHECK-NEXT: ret i1 [[TMP2]]
|
|
;
|
|
%1 = icmp eq i64 %b, 0
|
|
%2 = icmp ult i64 %a, %b
|
|
%3 = or i1 %1, %2
|
|
ret i1 %3
|
|
}
|
|
|
|
define i1 @icmp_add_ult_2(i32 %X) {
|
|
; CHECK-LABEL: @icmp_add_ult_2(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 14
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add i32 %X, -14
|
|
%cmp = icmp ult i32 %add, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_add_X_-14_ult_2(i32 %X) {
|
|
; CHECK-LABEL: @icmp_add_X_-14_ult_2(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 14
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add i32 %X, -14
|
|
%cmp = icmp ult i32 %add, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub_3_X_ult_2(i32 %X) {
|
|
; CHECK-LABEL: @icmp_sub_3_X_ult_2(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = or i32 %X, 1
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 3
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = sub i32 3, %X
|
|
%cmp = icmp ult i32 %add, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_add_X_-14_uge_2(i32 %X) {
|
|
; CHECK-LABEL: @icmp_add_X_-14_uge_2(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 14
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add i32 %X, -14
|
|
%cmp = icmp uge i32 %add, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub_3_X_uge_2(i32 %X) {
|
|
; CHECK-LABEL: @icmp_sub_3_X_uge_2(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = or i32 %X, 1
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 3
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = sub i32 3, %X
|
|
%cmp = icmp uge i32 %add, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_and_X_-16_eq-16(i32 %X) {
|
|
; CHECK-LABEL: @icmp_and_X_-16_eq-16(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %X, -17
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%and = and i32 %X, -16
|
|
%cmp = icmp eq i32 %and, -16
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_and_X_-16_ne-16(i32 %X) {
|
|
; CHECK-LABEL: @icmp_and_X_-16_ne-16(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, -16
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%and = and i32 %X, -16
|
|
%cmp = icmp ne i32 %and, -16
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub_-1_X_ult_4(i32 %X) {
|
|
; CHECK-LABEL: @icmp_sub_-1_X_ult_4(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %X, -5
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%sub = sub i32 -1, %X
|
|
%cmp = icmp ult i32 %sub, 4
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sub_-1_X_uge_4(i32 %X) {
|
|
; CHECK-LABEL: @icmp_sub_-1_X_uge_4(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, -4
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%sub = sub i32 -1, %X
|
|
%cmp = icmp uge i32 %sub, 4
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_swap_operands_for_cse(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @icmp_swap_operands_for_cse(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, %Y
|
|
; CHECK-NEXT: br i1 [[CMP]], label %true, label %false
|
|
; CHECK: true:
|
|
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[SUB]], 1
|
|
; CHECK-NEXT: br label %end
|
|
; CHECK: false:
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 16
|
|
; CHECK-NEXT: br label %end
|
|
; CHECK: end:
|
|
; CHECK-NEXT: [[RES_IN:%.*]] = phi i32 [ [[TMP0]], %true ], [ [[TMP1]], %false ]
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0
|
|
; CHECK-NEXT: ret i1 [[RES]]
|
|
;
|
|
entry:
|
|
%sub = sub i32 %X, %Y
|
|
%cmp = icmp ugt i32 %Y, %X
|
|
br i1 %cmp, label %true, label %false
|
|
true:
|
|
%restrue = trunc i32 %sub to i1
|
|
br label %end
|
|
false:
|
|
%shift = lshr i32 %sub, 4
|
|
%resfalse = trunc i32 %shift to i1
|
|
br label %end
|
|
end:
|
|
%res = phi i1 [%restrue, %true], [%resfalse, %false]
|
|
ret i1 %res
|
|
}
|
|
|
|
define i1 @icmp_swap_operands_for_cse2(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @icmp_swap_operands_for_cse2(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, %Y
|
|
; CHECK-NEXT: br i1 [[CMP]], label %true, label %false
|
|
; CHECK: true:
|
|
; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y
|
|
; CHECK-NEXT: [[SUB1:%.*]] = sub i32 %X, %Y
|
|
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]
|
|
; CHECK-NEXT: br label %end
|
|
; CHECK: false:
|
|
; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X
|
|
; CHECK-NEXT: br label %end
|
|
; CHECK: end:
|
|
; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[ADD]], %true ], [ [[SUB2]], %false ]
|
|
; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN:%.*]].in, 1
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0
|
|
; CHECK-NEXT: ret i1 [[RES]]
|
|
;
|
|
entry:
|
|
%cmp = icmp ugt i32 %Y, %X
|
|
br i1 %cmp, label %true, label %false
|
|
true:
|
|
%sub = sub i32 %X, %Y
|
|
%sub1 = sub i32 %X, %Y
|
|
%add = add i32 %sub, %sub1
|
|
%restrue = trunc i32 %add to i1
|
|
br label %end
|
|
false:
|
|
%sub2 = sub i32 %Y, %X
|
|
%resfalse = trunc i32 %sub2 to i1
|
|
br label %end
|
|
end:
|
|
%res = phi i1 [%restrue, %true], [%resfalse, %false]
|
|
ret i1 %res
|
|
}
|
|
|
|
define i1 @icmp_do_not_swap_operands_for_cse(i32 %X, i32 %Y) {
|
|
; CHECK-LABEL: @icmp_do_not_swap_operands_for_cse(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %Y, %X
|
|
; CHECK-NEXT: br i1 [[CMP]], label %true, label %false
|
|
; CHECK: true:
|
|
; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y
|
|
; CHECK-NEXT: br label %end
|
|
; CHECK: false:
|
|
; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X
|
|
; CHECK-NEXT: br label %end
|
|
; CHECK: end:
|
|
; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[SUB]], %true ], [ [[SUB2]], %false ]
|
|
; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN:%.*]].in, 1
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0
|
|
; CHECK-NEXT: ret i1 [[RES]]
|
|
;
|
|
entry:
|
|
%cmp = icmp ugt i32 %Y, %X
|
|
br i1 %cmp, label %true, label %false
|
|
true:
|
|
%sub = sub i32 %X, %Y
|
|
%restrue = trunc i32 %sub to i1
|
|
br label %end
|
|
false:
|
|
%sub2 = sub i32 %Y, %X
|
|
%resfalse = trunc i32 %sub2 to i1
|
|
br label %end
|
|
end:
|
|
%res = phi i1 [%restrue, %true], [%resfalse, %false]
|
|
ret i1 %res
|
|
}
|
|
|
|
define i1 @icmp_lshr_lshr_eq(i32 %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: @icmp_lshr_lshr_eq(
|
|
; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 %a, %b
|
|
; CHECK-NEXT: [[Z:%.*]] = icmp ult i32 [[Z:%.*]].unshifted, 1073741824
|
|
; CHECK-NEXT: ret i1 [[Z]]
|
|
;
|
|
%x = lshr i32 %a, 30
|
|
%y = lshr i32 %b, 30
|
|
%z = icmp eq i32 %x, %y
|
|
ret i1 %z
|
|
}
|
|
|
|
define i1 @icmp_ashr_ashr_ne(i32 %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: @icmp_ashr_ashr_ne(
|
|
; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 %a, %b
|
|
; CHECK-NEXT: [[Z:%.*]] = icmp ugt i32 [[Z:%.*]].unshifted, 255
|
|
; CHECK-NEXT: ret i1 [[Z]]
|
|
;
|
|
%x = ashr i32 %a, 8
|
|
%y = ashr i32 %b, 8
|
|
%z = icmp ne i32 %x, %y
|
|
ret i1 %z
|
|
}
|
|
|
|
define i1 @icmp_neg_cst_slt(i32 %a) {
|
|
; CHECK-LABEL: @icmp_neg_cst_slt(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %a, 10
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
|
;
|
|
%1 = sub nsw i32 0, %a
|
|
%2 = icmp slt i32 %1, -10
|
|
ret i1 %2
|
|
}
|
|
|
|
define i1 @icmp_and_or_lshr(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @icmp_and_or_lshr(
|
|
; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, %y
|
|
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[SHF1]], 1
|
|
; CHECK-NEXT: [[AND3:%.*]] = and i32 [[OR2]], %x
|
|
; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND3]], 0
|
|
; CHECK-NEXT: ret i1 [[RET]]
|
|
;
|
|
%shf = lshr i32 %x, %y
|
|
%or = or i32 %shf, %x
|
|
%and = and i32 %or, 1
|
|
%ret = icmp ne i32 %and, 0
|
|
ret i1 %ret
|
|
}
|
|
|
|
define i1 @icmp_and_or_lshr_cst(i32 %x) {
|
|
; CHECK-LABEL: @icmp_and_or_lshr_cst(
|
|
; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, 3
|
|
; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND1]], 0
|
|
; CHECK-NEXT: ret i1 [[RET]]
|
|
;
|
|
%shf = lshr i32 %x, 1
|
|
%or = or i32 %shf, %x
|
|
%and = and i32 %or, 1
|
|
%ret = icmp ne i32 %and, 0
|
|
ret i1 %ret
|
|
}
|
|
|
|
define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 29
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 4, %a
|
|
%cmp = icmp eq i32 %shl, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @shl_ap1_zero_ap2_non_zero_4(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_4(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 30
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 -2, %a
|
|
%cmp = icmp eq i32 %shl, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_positive(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 50, %a
|
|
%cmp = icmp eq i32 %shl, 50
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_negative(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 -50, %a
|
|
%cmp = icmp eq i32 %shl, -50
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_1(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_1(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%shl = shl i32 50, %a
|
|
%cmp = icmp eq i32 %shl, 25
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_2(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 1
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%shl = shl i32 25, %a
|
|
%cmp = icmp eq i32 %shl, 50
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3(i32 %a) {
|
|
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_3(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%shl = shl i32 26, %a
|
|
%cmp = icmp eq i32 %shl, 50
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sgt_zero_add_nsw(i32 %a) {
|
|
; CHECK-LABEL: @icmp_sgt_zero_add_nsw(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %a, -1
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add nsw i32 %a, 1
|
|
%cmp = icmp sgt i32 %add, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sge_zero_add_nsw(i32 %a) {
|
|
; CHECK-LABEL: @icmp_sge_zero_add_nsw(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %a, -2
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add nsw i32 %a, 1
|
|
%cmp = icmp sge i32 %add, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_slt_zero_add_nsw(i32 %a) {
|
|
; CHECK-LABEL: @icmp_slt_zero_add_nsw(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %a, -1
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add nsw i32 %a, 1
|
|
%cmp = icmp slt i32 %add, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @icmp_sle_zero_add_nsw(i32 %a) {
|
|
; CHECK-LABEL: @icmp_sle_zero_add_nsw(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %a, 0
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%add = add nsw i32 %a, 1
|
|
%cmp = icmp sle i32 %add, 0
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define zeroext i1 @icmp_cmpxchg_strong(i32* %sc, i32 %old_val, i32 %new_val) {
|
|
; CHECK-LABEL: @icmp_cmpxchg_strong(
|
|
; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst
|
|
; CHECK-NEXT: [[ICMP:%.*]] = extractvalue { i32, i1
|
|
;
|
|
%xchg = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst
|
|
%xtrc = extractvalue { i32, i1 } %xchg, 0
|
|
%icmp = icmp eq i32 %xtrc, %old_val
|
|
ret i1 %icmp
|
|
}
|
|
|
|
define i1 @f1(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: @f1(
|
|
; CHECK-NEXT: [[V:%.*]] = icmp sge i64 %a, %b
|
|
; CHECK-NEXT: ret i1 [[V]]
|
|
;
|
|
%t = sub nsw i64 %a, %b
|
|
%v = icmp sge i64 %t, 0
|
|
ret i1 %v
|
|
}
|
|
|
|
define i1 @f2(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: @f2(
|
|
; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 %a, %b
|
|
; CHECK-NEXT: ret i1 [[V]]
|
|
;
|
|
%t = sub nsw i64 %a, %b
|
|
%v = icmp sgt i64 %t, 0
|
|
ret i1 %v
|
|
}
|
|
|
|
define i1 @f3(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: @f3(
|
|
; CHECK-NEXT: [[V:%.*]] = icmp slt i64 %a, %b
|
|
; CHECK-NEXT: ret i1 [[V]]
|
|
;
|
|
%t = sub nsw i64 %a, %b
|
|
%v = icmp slt i64 %t, 0
|
|
ret i1 %v
|
|
}
|
|
|
|
define i1 @f4(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: @f4(
|
|
; CHECK-NEXT: [[V:%.*]] = icmp sle i64 %a, %b
|
|
; CHECK-NEXT: ret i1 [[V]]
|
|
;
|
|
%t = sub nsw i64 %a, %b
|
|
%v = icmp sle i64 %t, 0
|
|
ret i1 %v
|
|
}
|
|
|
|
define i32 @f5(i8 %a, i8 %b) {
|
|
; CHECK-LABEL: @f5(
|
|
; CHECK-NEXT: [[CONV:%.*]] = zext i8 %a to i32
|
|
; CHECK-NEXT: [[CONV3:%.*]] = zext i8 %b to i32
|
|
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]]
|
|
; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[SUB]], 0
|
|
; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i32 0, [[SUB]]
|
|
; CHECK-NEXT: [[SUB7_SUB:%.*]] = select i1 [[CMP4]], i32 [[SUB7]], i32 [[SUB]]
|
|
; CHECK-NEXT: ret i32 [[SUB7_SUB]]
|
|
;
|
|
%conv = zext i8 %a to i32
|
|
%conv3 = zext i8 %b to i32
|
|
%sub = sub nsw i32 %conv, %conv3
|
|
%cmp4 = icmp slt i32 %sub, 0
|
|
%sub7 = sub nsw i32 0, %sub
|
|
%sub7.sub = select i1 %cmp4, i32 %sub7, i32 %sub
|
|
ret i32 %sub7.sub
|
|
}
|
|
|
|
define i32 @f6(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @f6(
|
|
; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 %a, %b
|
|
; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 255
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CMP:%.*]].mask, 0
|
|
; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 10000, i32 0
|
|
; CHECK-NEXT: ret i32 [[S]]
|
|
;
|
|
%sext = shl i32 %a, 24
|
|
%conv = ashr i32 %sext, 24
|
|
%sext6 = shl i32 %b, 24
|
|
%conv4 = ashr i32 %sext6, 24
|
|
%cmp = icmp eq i32 %conv, %conv4
|
|
%s = select i1 %cmp, i32 10000, i32 0
|
|
ret i32 %s
|
|
}
|
|
|
|
define i32 @f7(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @f7(
|
|
; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 %a, %b
|
|
; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 511
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[CMP:%.*]].mask, 0
|
|
; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 10000, i32 0
|
|
; CHECK-NEXT: ret i32 [[S]]
|
|
;
|
|
%sext = shl i32 %a, 23
|
|
%sext6 = shl i32 %b, 23
|
|
%cmp = icmp ne i32 %sext, %sext6
|
|
%s = select i1 %cmp, i32 10000, i32 0
|
|
ret i32 %s
|
|
}
|
|
|
|
define i1 @f8(i32 %val, i32 %lim) {
|
|
; CHECK-LABEL: @f8(
|
|
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 %lim, 0
|
|
; CHECK-NEXT: ret i1 [[R]]
|
|
;
|
|
%lim.sub = add i32 %lim, -1
|
|
%val.and = and i32 %val, %lim.sub
|
|
%r = icmp ult i32 %val.and, %lim
|
|
ret i1 %r
|
|
}
|
|
|
|
define i1 @f9(i32 %val, i32 %lim) {
|
|
; CHECK-LABEL: @f9(
|
|
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 %lim, 0
|
|
; CHECK-NEXT: ret i1 [[R]]
|
|
;
|
|
%lim.sub = sub i32 %lim, 1
|
|
%val.and = and i32 %val, %lim.sub
|
|
%r = icmp ult i32 %val.and, %lim
|
|
ret i1 %r
|
|
}
|
|
|
|
define i1 @f10(i16 %p) {
|
|
; CHECK-LABEL: @f10(
|
|
; CHECK-NEXT: [[CMP580:%.*]] = icmp uge i16 %p, mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16))
|
|
; CHECK-NEXT: ret i1 [[CMP580]]
|
|
;
|
|
%cmp580 = icmp ule i16 mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16)), %p
|
|
ret i1 %cmp580
|
|
}
|
|
|
|
define i1 @cmp_sgt_rhs_dec(float %x, i32 %i) {
|
|
; CHECK-LABEL: @cmp_sgt_rhs_dec(
|
|
; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[CONV]], %i
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%conv = fptosi float %x to i32
|
|
%dec = sub nsw i32 %i, 1
|
|
%cmp = icmp sgt i32 %conv, %dec
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @cmp_sle_rhs_dec(float %x, i32 %i) {
|
|
; CHECK-LABEL: @cmp_sle_rhs_dec(
|
|
; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], %i
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%conv = fptosi float %x to i32
|
|
%dec = sub nsw i32 %i, 1
|
|
%cmp = icmp sle i32 %conv, %dec
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @cmp_sge_rhs_inc(float %x, i32 %i) {
|
|
; CHECK-LABEL: @cmp_sge_rhs_inc(
|
|
; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CONV]], %i
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%conv = fptosi float %x to i32
|
|
%inc = add nsw i32 %i, 1
|
|
%cmp = icmp sge i32 %conv, %inc
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @cmp_slt_rhs_inc(float %x, i32 %i) {
|
|
; CHECK-LABEL: @cmp_slt_rhs_inc(
|
|
; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[CONV]], %i
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%conv = fptosi float %x to i32
|
|
%inc = add nsw i32 %i, 1
|
|
%cmp = icmp slt i32 %conv, %inc
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @PR26407(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @PR26407(
|
|
; CHECK-NEXT: [[ADDX:%.*]] = add i32 %x, 2147483647
|
|
; CHECK-NEXT: [[ADDY:%.*]] = add i32 %y, 2147483647
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ADDX]], [[ADDY]]
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%addx = add i32 %x, 2147483647
|
|
%addy = add i32 %y, 2147483647
|
|
%cmp = icmp uge i32 %addx, %addy
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @cmp_inverse_mask_bits_set_eq(i32 %x) {
|
|
; CHECK-LABEL: @cmp_inverse_mask_bits_set_eq(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -43
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], -43
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%or = or i32 %x, 42
|
|
%cmp = icmp eq i32 %or, -1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @cmp_inverse_mask_bits_set_ne(i32 %x) {
|
|
; CHECK-LABEL: @cmp_inverse_mask_bits_set_ne(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -43
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], -43
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
;
|
|
%or = or i32 %x, 42
|
|
%cmp = icmp ne i32 %or, -1
|
|
ret i1 %cmp
|
|
}
|
|
|