forked from OSchip/llvm-project
118 lines
4.4 KiB
C++
118 lines
4.4 KiB
C++
//===-- LanaiTargetTransformInfo.h - Lanai specific TTI ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file a TargetTransformInfo::Concept conforming object specific to the
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// Lanai target machine. It uses the target's detailed information to
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// provide more precise answers to certain TTI queries, while letting the
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// target independent and default TTI implementations handle the rest.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_LANAI_LANAITARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_LANAI_LANAITARGETTRANSFORMINFO_H
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#include "Lanai.h"
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#include "LanaiSubtarget.h"
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#include "LanaiTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/Support/MathExtras.h"
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namespace llvm {
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class LanaiTTIImpl : public BasicTTIImplBase<LanaiTTIImpl> {
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typedef BasicTTIImplBase<LanaiTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const LanaiSubtarget *ST;
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const LanaiTargetLowering *TLI;
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const LanaiSubtarget *getST() const { return ST; }
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const LanaiTargetLowering *getTLI() const { return TLI; }
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public:
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explicit LanaiTTIImpl(const LanaiTargetMachine *TM, const Function &F)
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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bool shouldBuildLookupTables() const { return false; }
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TargetTransformInfo::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
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if (TyWidth == 32)
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return TTI::PSK_FastHardware;
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return TTI::PSK_Software;
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}
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InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
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TTI::TargetCostKind CostKind) {
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assert(Ty->isIntegerTy());
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if (Imm == 0)
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return TTI::TCC_Free;
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if (isInt<16>(Imm.getSExtValue()))
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return TTI::TCC_Basic;
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if (isInt<21>(Imm.getZExtValue()))
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return TTI::TCC_Basic;
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if (isInt<32>(Imm.getSExtValue())) {
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if ((Imm.getSExtValue() & 0xFFFF) == 0)
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return TTI::TCC_Basic;
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return 2 * TTI::TCC_Basic;
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}
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return 4 * TTI::TCC_Basic;
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}
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InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx,
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const APInt &Imm, Type *Ty,
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TTI::TargetCostKind CostKind,
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Instruction *Inst = nullptr) {
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return getIntImmCost(Imm, Ty, CostKind);
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}
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InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
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const APInt &Imm, Type *Ty,
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TTI::TargetCostKind CostKind) {
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return getIntImmCost(Imm, Ty, CostKind);
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}
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InstructionCost getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
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const Instruction *CxtI = nullptr) {
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int ISD = TLI->InstructionOpcodeToISD(Opcode);
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switch (ISD) {
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default:
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return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info,
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Opd2Info,
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Opd1PropInfo, Opd2PropInfo);
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case ISD::MUL:
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case ISD::SDIV:
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case ISD::UDIV:
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case ISD::UREM:
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// This increases the cost associated with multiplication and division
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// to 64 times what the baseline arithmetic cost is. The arithmetic
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// instruction cost was arbitrarily chosen to reduce the desirability
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// of emitting arithmetic instructions that are emulated in software.
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// TODO: Investigate the performance impact given specialized lowerings.
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return 64 * BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info,
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Opd2Info,
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Opd1PropInfo, Opd2PropInfo);
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}
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}
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_LANAI_LANAITARGETTRANSFORMINFO_H
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