forked from OSchip/llvm-project
310 lines
10 KiB
C
310 lines
10 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
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// RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED
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short _Fract sf;
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long _Fract lf;
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short _Accum sa;
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long _Accum la;
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unsigned short _Accum usa;
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unsigned long _Accum ula;
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_Sat short _Fract sf_sat;
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_Sat long _Fract lf_sat;
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_Sat short _Accum sa_sat;
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_Sat long _Accum la_sat;
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_Sat unsigned short _Accum usa_sat;
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_Sat unsigned long _Accum ula_sat;
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_Float16 h;
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// CHECK-LABEL: @half_fix1(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
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// CHECK-NEXT: [[TMP2:%.*]] = fptosi half [[TMP1]] to i8
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// CHECK-NEXT: store i8 [[TMP2]], i8* @sf, align 1
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// CHECK-NEXT: ret void
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//
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void half_fix1() {
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sf = h;
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}
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// CHECK-LABEL: @half_fix2(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
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// CHECK-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i32
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// CHECK-NEXT: store i32 [[TMP3]], i32* @lf, align 4
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// CHECK-NEXT: ret void
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//
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void half_fix2() {
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lf = h;
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}
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// CHECK-LABEL: @half_fix3(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
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// CHECK-NEXT: [[TMP2:%.*]] = fptosi half [[TMP1]] to i16
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// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2
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// CHECK-NEXT: ret void
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//
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void half_fix3() {
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sa = h;
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}
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// CHECK-LABEL: @half_fix4(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
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// CHECK-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i64
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// CHECK-NEXT: store i64 [[TMP3]], i64* @la, align 8
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// CHECK-NEXT: ret void
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//
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void half_fix4() {
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la = h;
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}
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// SIGNED-LABEL: @half_fix5(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02
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// SIGNED-NEXT: [[TMP3:%.*]] = fptoui float [[TMP2]] to i16
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// SIGNED-NEXT: store i16 [[TMP3]], i16* @usa, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @half_fix5(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
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// UNSIGNED-NEXT: [[TMP2:%.*]] = fptosi half [[TMP1]] to i16
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// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2
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// UNSIGNED-NEXT: ret void
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//
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void half_fix5() {
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usa = h;
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}
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// SIGNED-LABEL: @half_fix6(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000
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// SIGNED-NEXT: [[TMP3:%.*]] = fptoui float [[TMP2]] to i64
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// SIGNED-NEXT: store i64 [[TMP3]], i64* @ula, align 8
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @half_fix6(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
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// UNSIGNED-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i64
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// UNSIGNED-NEXT: store i64 [[TMP3]], i64* @ula, align 8
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// UNSIGNED-NEXT: ret void
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//
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void half_fix6() {
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ula = h;
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}
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// CHECK-LABEL: @half_sat1(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
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// CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f16(half [[TMP1]])
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// CHECK-NEXT: store i8 [[TMP2]], i8* @sf_sat, align 1
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// CHECK-NEXT: ret void
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//
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void half_sat1() {
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sf_sat = h;
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}
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// CHECK-LABEL: @half_sat2(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
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// CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP2]])
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// CHECK-NEXT: store i32 [[TMP3]], i32* @lf_sat, align 4
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// CHECK-NEXT: ret void
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//
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void half_sat2() {
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lf_sat = h;
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}
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// CHECK-LABEL: @half_sat3(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
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// CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]])
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// CHECK-NEXT: store i16 [[TMP2]], i16* @sa_sat, align 2
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// CHECK-NEXT: ret void
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//
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void half_sat3() {
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sa_sat = h;
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}
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// CHECK-LABEL: @half_sat4(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
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// CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]])
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// CHECK-NEXT: store i64 [[TMP3]], i64* @la_sat, align 8
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// CHECK-NEXT: ret void
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//
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void half_sat4() {
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la_sat = h;
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}
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// SIGNED-LABEL: @half_sat5(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02
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// SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP2]])
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// SIGNED-NEXT: store i16 [[TMP3]], i16* @usa_sat, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @half_sat5(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
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// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]])
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// UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0
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// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]
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// UNSIGNED-NEXT: store i16 [[SATMIN]], i16* @usa_sat, align 2
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// UNSIGNED-NEXT: ret void
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//
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void half_sat5() {
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usa_sat = h;
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}
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// SIGNED-LABEL: @half_sat6(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000
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// SIGNED-NEXT: [[TMP3:%.*]] = call i64 @llvm.fptoui.sat.i64.f32(float [[TMP2]])
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// SIGNED-NEXT: store i64 [[TMP3]], i64* @ula_sat, align 8
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @half_sat6(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float
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// UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
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// UNSIGNED-NEXT: [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]])
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// UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0
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// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]]
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// UNSIGNED-NEXT: store i64 [[SATMIN]], i64* @ula_sat, align 8
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// UNSIGNED-NEXT: ret void
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//
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void half_sat6() {
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ula_sat = h;
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}
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// CHECK-LABEL: @fix_half1(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf, align 1
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// CHECK-NEXT: [[TMP1:%.*]] = sitofp i8 [[TMP0]] to half
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// CHECK-NEXT: [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
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// CHECK-NEXT: store half [[TMP2]], half* @h, align 2
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// CHECK-NEXT: ret void
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//
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void fix_half1() {
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h = sf;
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}
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// CHECK-LABEL: @fix_half2(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
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// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
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// CHECK-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
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// CHECK-NEXT: store half [[TMP3]], half* @h, align 2
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// CHECK-NEXT: ret void
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//
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void fix_half2() {
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h = lf;
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}
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// CHECK-LABEL: @fix_half3(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = sitofp i16 [[TMP0]] to half
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// CHECK-NEXT: [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
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// CHECK-NEXT: store half [[TMP2]], half* @h, align 2
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// CHECK-NEXT: ret void
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//
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void fix_half3() {
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h = sa;
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}
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// CHECK-LABEL: @fix_half4(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8
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// CHECK-NEXT: [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float
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// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
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// CHECK-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
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// CHECK-NEXT: store half [[TMP3]], half* @h, align 2
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// CHECK-NEXT: ret void
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//
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void fix_half4() {
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h = la;
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}
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// SIGNED-LABEL: @fix_half5(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float
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// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 3.906250e-03
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// SIGNED-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
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// SIGNED-NEXT: store half [[TMP3]], half* @h, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @fix_half5(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to half
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// UNSIGNED-NEXT: [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
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// UNSIGNED-NEXT: store half [[TMP2]], half* @h, align 2
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// UNSIGNED-NEXT: ret void
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//
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void fix_half5() {
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h = usa;
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}
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// SIGNED-LABEL: @fix_half6(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8
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// SIGNED-NEXT: [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float
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// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3DF0000000000000
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// SIGNED-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
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// SIGNED-NEXT: store half [[TMP3]], half* @h, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @fix_half6(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8
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// UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float
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// UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
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// UNSIGNED-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
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// UNSIGNED-NEXT: store half [[TMP3]], half* @h, align 2
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// UNSIGNED-NEXT: ret void
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//
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void fix_half6() {
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h = ula;
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}
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