llvm-project/llvm/test/CodeGen
Huihui Zhang 01bfe2e494 [AArch64][SVE] Allow vector of pointers as legal type for masked load/store.
Refer to LangRef http://llvm.org/docs/LangRef.html#llvm-masked-load-intrinsics
'llvm.masked.load/store.*’ intrinsics are overloaded intrinsic, which allow the
load/store data to be a vector of any integer, floating-point or pointer data type.

Therefore, allow pointer data type when checking 'isLegalMaskedLoadStore()'.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D85045
2020-07-31 17:30:23 -07:00
..
AArch64 [AArch64][SVE] Allow vector of pointers as legal type for masked load/store. 2020-07-31 17:30:23 -07:00
AMDGPU Support addrspacecast initializers with isNoopAddrSpaceCast 2020-07-31 10:42:43 -04:00
ARC
ARM [MachineCopyPropagation] BackwardPropagatableCopy: add check for hasOverlappingMultipleDef 2020-07-29 16:21:01 +01:00
AVR [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
BPF [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Generic [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
Hexagon Align store conditional address 2020-07-30 10:42:00 -05:00
Inputs
Lanai
MIR AMDGPU: Serialize MFI spill fields 2020-07-28 20:01:57 -04:00
MSP430 [MSP430] Declare comparison LibCalls as returning i16 instead of i32 2020-06-30 11:04:22 +03:00
Mips [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
NVPTX [NVPTX] Fix for NVPTX module asm regression 2020-06-24 11:17:09 -07:00
PowerPC [PowerPC] Retrieve the offset from load/store if it stores to stack slots 2020-07-31 07:08:20 +00:00
RISCV [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SPARC [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [SystemZ] Ensure -mno-vx disables any use of vector features 2020-07-23 15:34:59 +02:00
Thumb
Thumb2 [DAGCombiner] Fold sext_inreg of a masked load into a sign extended masked load 2020-07-30 10:34:02 +01:00
VE [VE] Support symbol with offset value 2020-07-01 23:55:27 +09:00
WebAssembly [WebAssembly] Fixed 64-bit indices in br_table 2020-07-30 10:52:16 -07:00
WinCFGuard
WinEH
X86 Rename basic block sections options to be consistent. 2020-07-31 11:50:55 -07:00
XCore