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llvm-project/llvm/test/CodeGen
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Matt Arsenault 606bc315d6 AMDGPU: Fix v2f16 fneg/fabs pattern 
The integer operation convertion for some reason only happens
if the source is a bitcast from an integer, which happens to
always be the situation when the result is loaded. Add
an additional pattern for when the source operation is really
an FP operation.

llvm-svn: 333019
 		2018-05-22 20:13:34 +00:00
..
AArch64 [MachineOutliner] Add "thunk" outlining for AArch64. 2018-05-22 19:11:06 +00:00
AMDGPU AMDGPU: Fix v2f16 fneg/fabs pattern 2018-05-22 20:13:34 +00:00
ARC
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ARM ARM: be conservative when asked load/store alignment of weird type. 2018-05-21 12:43:54 +00:00
AVR [AVR] Add a regression test for struct return lowering 2018-03-20 11:23:03 +00:00
BPF [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Generic [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Hexagon [Hexagon] Add patterns for accumulating HVX compares 2018-05-22 18:27:02 +00:00
Inputs
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Lanai
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MIR [NFC] MIR-Canon: switching to a stable string sorting of instructions. 2018-05-13 06:07:20 +00:00
MSP430 Emit a left-shift instead of a power-of-two multiply for jump-tables 2018-05-16 08:58:26 +00:00
Mips [mips] Merge MipsLongBranch and MipsHazardSchedule passes 2018-05-22 13:24:38 +00:00
NVPTX [DAG] fold FP binops with undef operands to NaN 2018-05-21 23:54:19 +00:00
Nios2
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PowerPC [PowerPC] preserve test intent by removing undef 2018-05-16 22:48:48 +00:00
RISCV [RISCV] Separate base from offset in lowerGlobalAddress 2018-05-17 18:14:53 +00:00
SPARC [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
SystemZ [SystemZ] Fold AHIMux in foldMemoryOperandImpl. 2018-05-18 11:54:04 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 [Thumb2] fix typo in test from r332548 2018-05-17 03:24:25 +00:00
WebAssembly [WebAssembly] Fix fast-isel lowering illegal argument and return types. 2018-05-22 04:58:36 +00:00
WinCFGuard
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WinEH [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
X86 [DWARFv5] Put the DWO ID in its place. 2018-05-22 17:27:31 +00:00
XCore [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00