forked from OSchip/llvm-project
61 lines
2.0 KiB
LLVM
61 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=knl | FileCheck %s
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; ModuleID = 'convert'
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source_filename = "convert"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i8** @japi1_convert_690(i8**, i8***, i32) {
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; CHECK-LABEL: japi1_convert_690:
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; CHECK: # BB#0: # %top
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: .cfi_offset %ebx, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
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; CHECK-NEXT: calll julia.gc_root_decl
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
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; CHECK-NEXT: calll jl_get_ptls_states
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx # 4-byte Reload
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; CHECK-NEXT: movl 4(%ecx), %edx
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; CHECK-NEXT: movb (%edx), %bl
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; CHECK-NEXT: andb $1, %bl
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; CHECK-NEXT: movzbl %bl, %edx
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; CHECK-NEXT: movl %edx, (%esp)
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
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; CHECK-NEXT: calll jl_box_int32
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %eax, (%ecx)
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; CHECK-NEXT: addl $16, %esp
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: retl
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top:
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%3 = alloca i8***
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store volatile i8*** %1, i8**** %3
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%4 = call i8*** @julia.gc_root_decl()
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%5 = call i8**** @jl_get_ptls_states()
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%6 = bitcast i8**** %5 to i8***
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%7 = getelementptr i8**, i8*** %6, i64 3
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%8 = bitcast i8*** %7 to i64**
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%9 = load i64*, i64** %8
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%10 = getelementptr i8**, i8*** %1, i64 1
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%11 = load i8**, i8*** %10
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%12 = bitcast i8** %11 to i8*
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%13 = load i8, i8* %12
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%14 = trunc i8 %13 to i1
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%15 = zext i1 %14 to i8
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%16 = zext i8 %15 to i32
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%17 = call i8** @jl_box_int32(i32 signext %16)
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store i8** %17, i8*** %4
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ret i8** %17
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}
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declare i8**** @jl_get_ptls_states()
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declare i8** @jl_box_int32(i32)
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declare i8*** @julia.gc_root_decl()
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