llvm-project/llvm/test/CodeGen
Michael Liao 8372539543 Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith
- Merge the processing of LOAD_ADD with other atomic load-arith
  operations
- Separate the logic getting target constant for atomic-load-op and add
  an optimization for atomic-load-add on i16 with negative value
- Optimize a minor case for atomic-fetch-add i16 with negative operand. Test
  case is revised.

llvm-svn: 164243
2012-09-19 19:36:58 +00:00
..
ARM MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648 2012-09-18 21:24:16 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
CellSPU Add test triples to fix win32 failures. Revert workaround from r161292. 2012-08-08 20:31:37 +00:00
Generic BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle 2012-08-24 18:14:27 +00:00
Hexagon LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 2012-09-05 16:01:40 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
MSP430 Reapply r161633-161634 "Partition use lists so defs always come before uses."" 2012-08-10 00:21:30 +00:00
Mips Handled unaligned load/stores properly in Mips16 2012-09-15 01:02:03 +00:00
NVPTX Add llvm.fabs intrinsic. 2012-05-28 21:48:37 +00:00
PowerPC Really XFAIL test/CodeGen/PowerPC/structsinregs.ll. 2012-09-19 17:03:11 +00:00
SPARC Move load_to_switch.ll to test/CodeGen/SPARC/ 2012-09-19 09:25:03 +00:00
Thumb Fix Thumb2 fixup kind in the integrated-as. 2012-09-01 15:06:36 +00:00
Thumb2 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 2012-09-18 01:42:45 +00:00
X86 Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith 2012-09-19 19:36:58 +00:00
XCore Fix pattern for MKMSK instruction. 2012-06-13 17:59:12 +00:00