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llvm-project/mlir
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Michal Terepeta 1423e8bf5d [mlir][Vector] Support 0-D vectors in `BitCastOp` 
The implementation only allows to bit-cast between two 0-D vectors. We could
probably support casting from/to vectors like `vector<1xf32>`, but I wasn't
convinced that this would be important and it would require breaking the
invariant that `BitCastOp` works only on vectors with equal rank.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114854
 		2021-12-03 08:55:59 +00:00
..
cmake/modules [mlir][ods] AttrOrTypeGen uses Class 2021-12-01 16:53:23 +00:00
docs [mlir][ods] update attr/type def format docs 2021-12-02 23:42:47 +00:00
examples [mlir] Move trait to InferTypeOpInterface 2021-11-21 14:41:12 -08:00
include [mlir][Vector] Support 0-D vectors in `BitCastOp` 2021-12-03 08:55:59 +00:00
lib [mlir][Vector] Support 0-D vectors in `BitCastOp` 2021-12-03 08:55:59 +00:00
python [mlir][python] Audit and fix a lot of the Python pyi stubs. 2021-11-29 21:40:28 -08:00
test [mlir][Vector] Support 0-D vectors in `BitCastOp` 2021-12-03 08:55:59 +00:00
tools [mlir][ods] fix defgen on empty files 2021-12-02 21:25:59 +00:00
unittests Using make_unique instead of `new` (NFC) 2021-12-03 01:53:42 +00:00
utils [mlir][NFC] Replace references to Identifier with StringAttr 2021-11-16 17:36:26 +00:00
.clang-format
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.clang-tidy NFC: .clang-tidy: Inherit configs from parents to improve maintainability 2021-06-08 08:25:59 -07:00
CMakeLists.txt [mlir] Add MLIR-C dylib. 2021-11-11 22:58:13 -08:00
LICENSE.TXT
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README.md
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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.