llvm-project/llvm/test/Transforms/SLPVectorizer
Michael Zolotukhin fc783e91e0 [SLP] Don't vectorize loads of non-packed types (like i1, i2).
Summary:
Given an array of i2 elements, 4 consecutive scalar loads will be lowered to
i8-sized loads and thus will access 4 consecutive bytes in memory. If we
vectorize these loads into a single <4 x i2> load, it'll access only 1 byte in
memory. Hence, we should prohibit vectorization in such cases.

PS: Initial patch was proposed by Arnold.

Reviewers: aschwaighofer, nadav, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13277

llvm-svn: 248943
2015-09-30 21:05:43 +00:00
..
AArch64 [SLP] Add one more test case for propagating 'nontemporal' attributes. 2015-08-21 00:08:39 +00:00
AMDGPU [SLPVectorizer] Try different vectorization factors for store chains 2015-07-08 23:40:55 +00:00
ARM [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
X86 [SLP] Don't vectorize loads of non-packed types (like i1, i2). 2015-09-30 21:05:43 +00:00
XCore [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00