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llvm-project/mlir/test
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KareemErgawy-TomTom e5f2898bc7 [MLIR][STD] Fold trunci (zexti). 
This patch folds the following pattern:

```
  %arg0 = ...
  %0 = zexti %arg0 : i1 to i8
  %1 = trunci %0 : i8 to i1
```

into just `%arg0`.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D99453
 		2021-03-27 19:40:10 +01:00
..
Analysis [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
Bindings [mlir][linalg] Add an InitTensorOp python builder. 2021-03-25 15:17:48 -07:00
CAPI Define a `NoTerminator` traits that allows operations with a single block region to not provide a terminator 2021-03-25 03:59:03 +00:00
Conversion Revert "[Canonicalizer] Process regions top-down instead of bottom up & reuse existing constants." 2021-03-25 22:17:26 +05:30
Dialect [mlir][tosa] TOSA MLIR dialect update to v0.22, part 1 2021-03-25 21:34:34 -07:00
EDSC [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
Examples [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
IR [mlir][ODS] Fix `VariadicRegion` code generation for `NoTerminator` Ops 2021-03-26 14:24:36 +03:00
Integration Update syntax for amx.tile_muli to use two Unit attr to mark the zext case 2021-03-20 04:12:24 +00:00
Interfaces/DataLayoutInterfaces [mlir] introduce data layout entry for index type 2021-03-24 15:13:42 +01:00
Pass Avoid using /dev/null in test 2020-12-30 14:16:13 -08:00
Rewrite [mlir][PDL] Add support for variadic operands and results in the PDL byte code 2021-03-16 13:20:19 -07:00
SDBM Remove global dialect registration 2020-10-24 00:35:55 +00:00
Target [mlir] Translate global initializers after creating all LLVM IR globals 2021-03-25 09:53:58 +01:00
Transforms [MLIR][STD] Fold trunci (zexti). 2021-03-27 19:40:10 +01:00
Unit [lit] Sort test start times based on prior test timing data 2021-03-16 05:23:04 -04:00
lib [mlir][ODS] Fix `VariadicRegion` code generation for `NoTerminator` Ops 2021-03-26 14:24:36 +03:00
mlir-cpu-runner [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
mlir-linalg-ods-gen [mlir][linalg] Add support for using scalar attributes in TC ops. 2021-03-10 01:51:12 -08:00
mlir-opt [mlir][amx] Add Intel AMX dialect (architectural-specific vector dialect) 2021-03-15 17:59:05 -07:00
mlir-reduce Fix the order of directives and the target string 2021-03-22 11:10:12 -07:00
mlir-spirv-cpu-runner [mlir] fix SPIR-V CPU and Vulkan runners after e2310704d8 2021-03-15 18:36:58 +01:00
mlir-tblgen Revert "[Canonicalizer] Process regions top-down instead of bottom up & reuse existing constants." 2021-03-25 22:17:26 +05:30
mlir-translate [mlir] Print the correct tool name in mlirTranslateMain 2021-01-05 19:17:01 -08:00
mlir-vulkan-runner [mlir] fix SPIR-V CPU and Vulkan runners after e2310704d8 2021-03-15 18:36:58 +01:00
APITest.h Mass update the MLIR license header to mention "Part of the LLVM project" 2020-01-26 03:58:30 +00:00
CMakeLists.txt [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
lit.cfg.py [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
lit.site.cfg.py.in [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00