llvm-project/llvm/include
Jakob Stoklund Olesen 9760f04ef9 Add an isSSA() flag to MachineRegisterInfo.
This flag is true from isel to register allocation when the machine
function is required to be in SSA form.  The TwoAddressInstructionPass
and PHIElimination passes clear the flag.

The SSA flag wil be used by the machine code verifier to check for SSA
form, and eventually an assertion can enforce it in +Asserts builds.
This will catch the common target error of creating machine code with
multiple defs of a virtual register.

llvm-svn: 136532
2011-07-29 22:51:22 +00:00
..
llvm Add an isSSA() flag to MachineRegisterInfo. 2011-07-29 22:51:22 +00:00
llvm-c LangRef and basic memory-representation/reading/writing for 'cmpxchg' and 2011-07-28 21:48:00 +00:00