forked from OSchip/llvm-project
120 lines
4.2 KiB
LLVM
120 lines
4.2 KiB
LLVM
; RUN: llc -global-isel -mtriple=amdgcn-unknown-amdhsa --amdhsa-code-object-version=2 -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=CO-V2 -check-prefix=CI-HSA %s
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; RUN: llc -global-isel -mtriple=amdgcn-unknown-amdhsa --amdhsa-code-object-version=2 -mcpu=carrizo -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=CO-V2 -check-prefix=VI-HSA %s
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; RUN: llc -global-isel -mtriple=amdgcn-- -mcpu=hawaii -mattr=+flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=MESA -check-prefix=SI-MESA %s
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; RUN: llc -global-isel -mtriple=amdgcn-- -mcpu=tonga -mattr=+flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=MESA -check-prefix=VI-MESA %s
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; RUN: llc -global-isel -mtriple=amdgcn-unknown-mesa3d -mattr=+flat-for-global -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2,SI-MESA %s
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; RUN: llc -global-isel -mtriple=amdgcn-unknown-mesa3d -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2,VI-MESA %s
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.workitem.id.y() #0
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declare i32 @llvm.amdgcn.workitem.id.z() #0
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; MESA: .section .AMDGPU.config
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; MESA: .long 47180
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; MESA-NEXT: .long 132{{$}}
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; ALL-LABEL: {{^}}test_workitem_id_x:
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; CO-V2: enable_vgpr_workitem_id = 0
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; ALL-NOT: v0
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; ALL: {{buffer|flat}}_store_dword {{.*}}v0
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define amdgpu_kernel void @test_workitem_id_x(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; MESA: .section .AMDGPU.config
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; MESA: .long 47180
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; MESA-NEXT: .long 2180{{$}}
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; ALL-LABEL: {{^}}test_workitem_id_y:
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; CO-V2: enable_vgpr_workitem_id = 1
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; ALL-NOT: v1
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; ALL: {{buffer|flat}}_store_dword {{.*}}v1
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define amdgpu_kernel void @test_workitem_id_y(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.y()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; MESA: .section .AMDGPU.config
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; MESA: .long 47180
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; MESA-NEXT: .long 4228{{$}}
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; ALL-LABEL: {{^}}test_workitem_id_z:
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; CO-V2: enable_vgpr_workitem_id = 2
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; ALL-NOT: v2
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; ALL: {{buffer|flat}}_store_dword {{.*}}v2
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define amdgpu_kernel void @test_workitem_id_z(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.z()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: {{^}}test_workitem_id_x_usex2:
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; ALL-NOT: v0
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; ALL: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
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; ALL-NOT: v0
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; ALL: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
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define amdgpu_kernel void @test_workitem_id_x_usex2(i32 addrspace(1)* %out) #1 {
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%id0 = call i32 @llvm.amdgcn.workitem.id.x()
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store volatile i32 %id0, i32 addrspace(1)* %out
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%id1 = call i32 @llvm.amdgcn.workitem.id.x()
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store volatile i32 %id1, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: {{^}}test_workitem_id_x_use_outside_entry:
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; ALL-NOT: v0
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; ALL: flat_store_dword
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; ALL-NOT: v0
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; ALL: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
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define amdgpu_kernel void @test_workitem_id_x_use_outside_entry(i32 addrspace(1)* %out, i32 %arg) #1 {
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bb0:
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store volatile i32 0, i32 addrspace(1)* %out
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%cond = icmp eq i32 %arg, 0
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br i1 %cond, label %bb1, label %bb2
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bb1:
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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store volatile i32 %id, i32 addrspace(1)* %out
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br label %bb2
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bb2:
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ret void
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}
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; ALL-LABEL: {{^}}test_workitem_id_x_func:
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; ALL: s_waitcnt
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; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
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define void @test_workitem_id_x_func(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: {{^}}test_workitem_id_y_func:
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; ALL: v_lshrrev_b32_e32 v2, 10, v2
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; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
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define void @test_workitem_id_y_func(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.y()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: {{^}}test_workitem_id_z_func:
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; ALL: v_lshrrev_b32_e32 v2, 20, v2
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; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
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define void @test_workitem_id_z_func(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.z()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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