forked from OSchip/llvm-project
33 lines
1.3 KiB
LLVM
33 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -global-isel-abort=1 -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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define amdgpu_ps void @test_intr_icmp_eq_i64(i64 addrspace(1)* %out, i32 %src) #0 {
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; GCN-LABEL: test_intr_icmp_eq_i64:
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; GCN: ; %bb.0:
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; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0x64, v2
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; GCN-NEXT: v_mov_b32_e32 v3, s1
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; GCN-NEXT: v_mov_b32_e32 v2, s0
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; GCN-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
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; GCN-NEXT: s_endpgm
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%result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 %src, i32 100, i32 32)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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define amdgpu_ps void @test_intr_icmp_ne_i32(i32 addrspace(1)* %out, i32 %src) #1 {
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; GCN-LABEL: test_intr_icmp_ne_i32:
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; GCN: ; %bb.0:
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; GCN-NEXT: v_cmp_ne_u32_e64 s0, 0x64, v2
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; GCN-NEXT: ; implicit-def: $vcc_hi
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; GCN-NEXT: v_mov_b32_e32 v2, s0
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; GCN-NEXT: global_store_dword v[0:1], v2, off
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; GCN-NEXT: s_endpgm
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%result = call i32 @llvm.amdgcn.icmp.i32.i32(i32 %src, i32 100, i32 33)
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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declare i64 @llvm.amdgcn.icmp.i64.i32(i32, i32, i32)
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declare i32 @llvm.amdgcn.icmp.i32.i32(i32, i32, i32)
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attributes #0 = { "target-features"="+wavefrontsize64" }
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attributes #1 = { "target-features"="+wavefrontsize32" }
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