forked from OSchip/llvm-project
111 lines
4.4 KiB
LLVM
111 lines
4.4 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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;
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; SADDLBT
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;
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define <vscale x 8 x i16> @saddlbt_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
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; CHECK-LABEL: saddlbt_b:
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; CHECK: saddlbt z0.h, z0.b, z1.b
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; CHECK-NEXT: ret
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%out = call <vscale x 8 x i16> @llvm.aarch64.sve.saddlbt.nxv8i16(<vscale x 16 x i8> %a,
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<vscale x 16 x i8> %b)
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ret <vscale x 8 x i16> %out
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}
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define <vscale x 4 x i32> @saddlbt_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
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; CHECK-LABEL: saddlbt_h:
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; CHECK: saddlbt z0.s, z0.h, z1.h
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; CHECK-NEXT: ret
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%out = call <vscale x 4 x i32> @llvm.aarch64.sve.saddlbt.nxv4i32(<vscale x 8 x i16> %a,
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<vscale x 8 x i16> %b)
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ret <vscale x 4 x i32> %out
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}
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define <vscale x 2 x i64> @saddlbt_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: saddlbt_s:
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; CHECK: saddlbt z0.d, z0.s, z1.s
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; CHECK-NEXT: ret
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%out = call <vscale x 2 x i64> @llvm.aarch64.sve.saddlbt.nxv2i64(<vscale x 4 x i32> %a,
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<vscale x 4 x i32> %b)
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ret <vscale x 2 x i64> %out
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}
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;
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; SSUBLBT
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;
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define <vscale x 8 x i16> @ssublbt_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
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; CHECK-LABEL: ssublbt_b:
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; CHECK: ssublbt z0.h, z0.b, z1.b
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; CHECK-NEXT: ret
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%out = call <vscale x 8 x i16> @llvm.aarch64.sve.ssublbt.nxv8i16(<vscale x 16 x i8> %a,
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<vscale x 16 x i8> %b)
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ret <vscale x 8 x i16> %out
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}
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define <vscale x 4 x i32> @ssublbt_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
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; CHECK-LABEL: ssublbt_h:
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; CHECK: ssublbt z0.s, z0.h, z1.h
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; CHECK-NEXT: ret
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%out = call <vscale x 4 x i32> @llvm.aarch64.sve.ssublbt.nxv4i32(<vscale x 8 x i16> %a,
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<vscale x 8 x i16> %b)
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ret <vscale x 4 x i32> %out
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}
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define <vscale x 2 x i64> @ssublbt_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: ssublbt_s:
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; CHECK: ssublbt z0.d, z0.s, z1.s
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; CHECK-NEXT: ret
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%out = call <vscale x 2 x i64> @llvm.aarch64.sve.ssublbt.nxv2i64(<vscale x 4 x i32> %a,
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<vscale x 4 x i32> %b)
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ret <vscale x 2 x i64> %out
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}
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;
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; SSUBLTB
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;
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define <vscale x 8 x i16> @ssubltb_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
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; CHECK-LABEL: ssubltb_b:
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; CHECK: ssubltb z0.h, z0.b, z1.b
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; CHECK-NEXT: ret
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%out = call <vscale x 8 x i16> @llvm.aarch64.sve.ssubltb.nxv8i16(<vscale x 16 x i8> %a,
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<vscale x 16 x i8> %b)
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ret <vscale x 8 x i16> %out
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}
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define <vscale x 4 x i32> @ssubltb_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
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; CHECK-LABEL: ssubltb_h:
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; CHECK: ssubltb z0.s, z0.h, z1.h
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; CHECK-NEXT: ret
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%out = call <vscale x 4 x i32> @llvm.aarch64.sve.ssubltb.nxv4i32(<vscale x 8 x i16> %a,
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<vscale x 8 x i16> %b)
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ret <vscale x 4 x i32> %out
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}
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define <vscale x 2 x i64> @ssubltb_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: ssubltb_s:
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; CHECK: ssubltb z0.d, z0.s, z1.s
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; CHECK-NEXT: ret
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%out = call <vscale x 2 x i64> @llvm.aarch64.sve.ssubltb.nxv2i64(<vscale x 4 x i32> %a,
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<vscale x 4 x i32> %b)
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ret <vscale x 2 x i64> %out
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}
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declare <vscale x 8 x i16> @llvm.aarch64.sve.saddlbt.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
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declare <vscale x 4 x i32> @llvm.aarch64.sve.saddlbt.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
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declare <vscale x 2 x i64> @llvm.aarch64.sve.saddlbt.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
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declare <vscale x 8 x i16> @llvm.aarch64.sve.ssublbt.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
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declare <vscale x 4 x i32> @llvm.aarch64.sve.ssublbt.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
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declare <vscale x 2 x i64> @llvm.aarch64.sve.ssublbt.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
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declare <vscale x 8 x i16> @llvm.aarch64.sve.ssubltb.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
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declare <vscale x 4 x i32> @llvm.aarch64.sve.ssubltb.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
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declare <vscale x 2 x i64> @llvm.aarch64.sve.ssubltb.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
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