forked from OSchip/llvm-project
129 lines
3.9 KiB
LLVM
129 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
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define <16 x i8> @fn1_vector(<16 x i8> %arg) {
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; CHECK-LABEL: fn1_vector:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adrp x8, .LCPI0_0
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; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI0_0]
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; CHECK-NEXT: mul v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: ret
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entry:
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%shl = shl <16 x i8> %arg, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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%mul = mul <16 x i8> %shl, <i8 0, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
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ret <16 x i8> %mul
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}
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define <16 x i8> @fn2_vector(<16 x i8> %arg) {
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; CHECK-LABEL: fn2_vector:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adrp x8, .LCPI1_0
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; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI1_0]
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; CHECK-NEXT: mul v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: ret
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entry:
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%mul = mul <16 x i8> %arg, <i8 0, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
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%shl = shl <16 x i8> %mul, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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ret <16 x i8> %shl
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}
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define <16 x i8> @fn1_vector_undef(<16 x i8> %arg) {
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; CHECK-LABEL: fn1_vector_undef:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adrp x8, .LCPI2_0
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; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI2_0]
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; CHECK-NEXT: mul v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: ret
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entry:
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%shl = shl <16 x i8> %arg, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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%mul = mul <16 x i8> %shl, <i8 undef, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
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ret <16 x i8> %mul
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}
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define <16 x i8> @fn2_vector_undef(<16 x i8> %arg) {
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; CHECK-LABEL: fn2_vector_undef:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adrp x8, .LCPI3_0
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; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI3_0]
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; CHECK-NEXT: mul v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: ret
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entry:
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%mul = mul <16 x i8> %arg, <i8 undef, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
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%shl = shl <16 x i8> %mul, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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ret <16 x i8> %shl
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}
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define i32 @fn1_scalar(i32 %arg) {
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; CHECK-LABEL: fn1_scalar:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #1664
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; CHECK-NEXT: mul w0, w0, w8
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; CHECK-NEXT: ret
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entry:
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%shl = shl i32 %arg, 7
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%mul = mul i32 %shl, 13
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ret i32 %mul
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}
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define i32 @fn2_scalar(i32 %arg) {
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; CHECK-LABEL: fn2_scalar:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #1664
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; CHECK-NEXT: mul w0, w0, w8
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; CHECK-NEXT: ret
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entry:
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%mul = mul i32 %arg, 13
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%shl = shl i32 %mul, 7
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ret i32 %shl
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}
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define i32 @fn1_scalar_undef(i32 %arg) {
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; CHECK-LABEL: fn1_scalar_undef:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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entry:
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%shl = shl i32 %arg, 7
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%mul = mul i32 %shl, undef
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ret i32 %mul
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}
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define i32 @fn2_scalar_undef(i32 %arg) {
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; CHECK-LABEL: fn2_scalar_undef:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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entry:
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%mul = mul i32 %arg, undef
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%shl = shl i32 %mul, 7
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ret i32 %shl
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}
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define i32 @fn1_scalar_opaque(i32 %arg) {
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; CHECK-LABEL: fn1_scalar_opaque:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #13
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: lsl w0, w8, #7
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; CHECK-NEXT: ret
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entry:
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%bitcast = bitcast i32 13 to i32
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%shl = shl i32 %arg, 7
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%mul = mul i32 %shl, %bitcast
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ret i32 %mul
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}
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define i32 @fn2_scalar_opaque(i32 %arg) {
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; CHECK-LABEL: fn2_scalar_opaque:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #13
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: lsl w0, w8, #7
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; CHECK-NEXT: ret
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entry:
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%bitcast = bitcast i32 13 to i32
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%mul = mul i32 %arg, %bitcast
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%shl = shl i32 %mul, 7
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ret i32 %shl
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}
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